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DLPC3435: DLPC3435 HOST_IRQ and I2C timing

Tatsuya Makihara
Prodigy 20 points
Part Number: DLPC3435

Tool/software:

Regarding the timing of DLPC3435's HOST_IRQ and I2C, are there any timing regulations for the period from the falling edge of HOST_IRQ to the start of I2C?

I would like to know if there is a minimum required time regulation.

It is the time (e) in the diagram below.

  • 0
    TI__Expert 7105 points

    Hello, 

    Host_IRQ indicated there is some internal processing being done to the DLPC, for this reason we do not recommend sending I2C commands to the DLPC  while Host_IRQ is high. We recommend routing this signal to your front end processor and using it as a "DLPC busy" signal.

    Best,

    Max

  • 0 in reply to Maximus Rusi
    Prodigy 20 points

    I understand that Host_IRQ performs some internal processing for the DLPC.

    I would like to know whether a wait time is required after the DLPC's internal processing is completed and Host_IRQ goes low before the DLPC can stabilize and send and receive I2C.

    If there is a wait time after Host_IRQ goes low so that the DLPC can stabilize and send and receive I2C, I would like to know how long the wait time should be.

    Looking at the startup sequence in the data sheet, there is a gap marked (e) between when Host_IRQ goes low and the start of I2C, so I would like to know how long the expected wait time for this part is.

  • 0 in reply to Tatsuya Makihara
    TI__Expert 7105 points

    Hello,

    There is no time delay required necessarily. Once Host_IRQ has transitioned low the DLPC has completed internal processing and is ready for I2C communication, i.e. Host_IRQ transition is the last thing to occur in the processing pipeline.

    Best,

    Max