Tool/software:
Section 7.3.3.2 SPI Flash Programming on pages 36 and 37 of the DLPC3439 datasheet states "The SPI pins of the flash can directly be driven for flash programming while the DLPC34xx controller I/Os are tri-stated. SPI0_CLK, SPI0_DOUT, and SPI0_CSZ0 I/O can be tri-stated by holding RESETZ in a logic low state".
Does the DLPC3439 device tri-state from the SPI bus using hardware logic or firmware? Does the DLPC3439 respond to the RESETZ signal via built-in hardware logic or firmware?
Section 9.3 Power-Up Initialization Sequence on page 52 of datasheet states:
No signals output by the DLPC34xx controller will be in their active state while RESETZ is asserted. The following signals are tri-stated while RESETZ is asserted:
• SPI0_CLK
• SPI0_DOUT
• SPI0_CSZ0
• SPI0_CSZ1
The datasheet suggests that the hardware logic in the device causes it to tri-state from the SPI bus when RESETZ is asserted. Will the device tri-state from the SPI bus when it has not run firmware i.e. the flash memory is blank? I have seen other posts on the forum that suggest that it uses the firmware to tri-state from the SPI bus. Does the flash memory need to be programmed once with firmware to get the tri-state operation? Does the flash memory need to be programmed once using a direct connection e.g. SOIC clip, before being able to reprogram the flash memory using a microcontroller when the DLPC3439 is on the same SPI bus?