I'm developing a DLP/DMD system based on the LC4500 reference design. Layout recommendations specify 50 ohm traces on one hand, but also recommend different minimum trace widths for data/control lines (5 mil) and clocks (7 mil). How can these seemingly contradictory recommendations be reconciled? Can traces of different widths have the same impedance?
Also, I noticed that TI is recommending trace widths for VREF, VBIAS, VRESET and VOFFSET to be 15 mils. That seems excessive considering the maximum current (on VBIAS) is 3.55 mA. It is difficult enough laying this out near the interposers with 5 mil traces. Am I missing something here?