Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DLPC350 blocks the I2C BUS and pulls SCL Low

Other Parts Discussed in Thread: DLPC350

I try to read the registers via I2C after DLPC350 is booted but scl is sticked low after I send the sub-address. See the below figure. After the 8. (before the 9. Tact “acknowledge”)  the SCL is sticked low. It has the same behavior with 100KHz .

 

The state is:

1)DLPC is booted

2) DMD schows the internal pattern (TI LOGO)

3) I2C_ADDR_SEL ist LOW

4)  34 04

Do you have any ideas, what can be the reason for this?

  • Hello Farzad,

    Look at DLPC350 controller datasheet Figure 24. Internal Memory Test Diagram, you must ensure that the first I2C command must be issued after INIT_DONE (GPIO26) signal goes low. Typically it will be roughly 100ms after power on reset. 

    To debug further, look at the GPIO26 of DLPC350 and check if it is showing any fault. 

    Regards,

    Sanjeev