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Sequence mode. DLPC350 how grabs a new 24-bit frame

alink zhou
Prodigy 80 points
Other Parts Discussed in Thread: DLPC350, DLPC300

Sequence mode. DLPC350 how grabs a new 24-bit frame?

  • 0
    TI__Mastermind 30875 points
    Hi,
    We are not able to follow your question completely. Can you please explain in detail?
    Regards,
    Sanjeev
  • 0 in reply to Sanjeev
    Prodigy 80 points

    I used DLP LightCrafter 4500 serial mode, an external video source. I would like to use vsync trigger, external FPGA generates an image sequence mode, my question is: Under this external vsync trigger mode, video source to generate the FPGA program how to write. Please describe in detail. THX! My system diagram is as follows:


    My mode of operation is as follows:
    1. Use an external MCU via the USB configuration DLPC350 enter sequence mode, using vsync trigger. This part is no problem.
    2.FPGA Programming: program generation sequence is transmitted to DLPC4500 module. But I do not know how to program? My approach is:

    I wrote FPGA simulation generates an image sequence diagram, I do not know whether my approach is wrong or what other reasons, DMD has no reaction, it does not show anything.

  • 0 in reply to alink zhou
    TI__Mastermind 30875 points

    You have to generate RGB 24-bit signals like you do for any other Digital device. http://www.ti.com/lit/ds/symlink/dlpc350.pdf Section 6.7 Port 1 Input Pixel Interface Timing Requirements

    Also look at the framing implementation as shown in DLPC300 http://www.ti.com/lit/ds/symlink/dlpc300.pdf Figure #12, the only change for DLPC350 is changes to the blanking and pixel clock timings for that you can refer to  http://www.ti.com/lit/ds/symlink/dlpc350.pdf Section 6.7 Port 1 Input Pixel Interface Timing Requirements

    Regards,

    Sanjeev

  • 0 in reply to Sanjeev
    Prodigy 80 points
    I've prepared according to this sequence FPGA program, and can display an image. But I think it is programmed in the video mode. But I want to use sequence mode, also using this sequence ("in DLPC300 www.ti.com/.../dlpc300.pdf Figure # 12,") it?
  • 0 in reply to Sanjeev
    Prodigy 80 points
    Sanjeev Why do not reply me? See someone else's post gave reply
  • 0 in reply to alink zhou
    TI__Mastermind 30875 points
    Nothing like that. We always try to answer queries as much as possible.

    Here is your answer -

    Yes, you should still need to send video signal as you are sending in Video Mode. So signal timing wise it is all same. Only thing you should be aware about is that - In Video Pattern Streaming mode - based on the patterns you are interested to display from a RGB 24-bit frame, the SUM of ALL pattern exposure in that frame must be <= the actual VSYNC period.

    For example:
    To display 6 4-bit patterns with pattern exposure as 2000us; then the total display time of all 6 patterns 2ms * 6 = 12ms. So the incoming VSYNC period has to be > 12ms; therefore maximum frame rate you can send will be <= 83Hz.

    Now if you want to change the pattern exposure to 4000us then total time take to display 6 patterns from a frame will be 4ms * 6 = 24ms, so frame rate has <= 41Hz.

    Key is to generate 912x1140 video at frame-rate matching to the sum of ALL pattern(s) exposure timings.

    Regards,
    Sanjeev
  • 0 in reply to Sanjeev
    Prodigy 80 points
    Thanks Sanjeev, I do not mean to blame. Because I really want time to know the reasons for the conclusion. I'll be by your opinion programming, if you encounter problems will keep learning. THX
  • 0 in reply to alink zhou
    Prodigy 80 points

    Hello, Sanjeev. I still do not understand, if you provide a timing diagram, then HSYNV still use it?

  • 0 in reply to Sanjeev
    Prodigy 80 points
    Hello, Sanjeev. In fact, I need only use FPGA to generate an image, the image and the pixel corresponds exactly to the requirements.
    I know it should use sequence mode, do not use the video mode.
    I can configure DLPC350 to sequence mode.
    I also have a video mode can be used to generate video data, but these data will be internally DLPC350 processing, and thus can not pinpoint each pixel.
    So I have to do is generate a sequence pattern image with, but I do not know how to generate the image. Can you help me?
  • 0 in reply to alink zhou
    TI__Mastermind 30875 points
    How are you generating the video frames in FPGA ? It is going to be same in Pattern Sequence mode also, for example, if a image is stored on the flash memory, your FPGA can read the image data send it over the video port or video buffer of your FPGA.
    Regards,Sanjeev