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Trigger Mode 0 Example and buffer swap setting in Pattern LUT

Edmond So
Prodigy 110 points
Other Parts Discussed in Thread: DLPC350

Dear TI engineers,

I have some questions regarding the "Trigger Mode 0 Example" in the DLPC350 Programmer’s Guide, and also about the bufffer swap setting in the pattern LUT.

First, to confirm my understanding of the pattern LUT, I have followed through the example given in section 4.2 of the DLPC350 guide (DLPU010E).  I have noticed some discrepancies between the description in S4.2 on pg. 62 and the diagram in Fig 2-9 on pg. 42.  Please correct me if my understanding is incorrect.

1a. The colors of the first two frames seems to be mixed up.  The first frame (P1) is shown as red in Fig 2-9, whereas the LUT value given in step 6d in the description is 0x62101 (bit 4:7 of byte 1 is b0010 = green).  Likewise, second frame (P2) is shown as green, whereas the LUT value is 0x21107 (bit 4:7 of byte 1 is b0001 = red).  Lastly, although inconsequential, frame P3.1 and P7.2 are correctly shown as blue, but colored in different shades.

1b. In step 3, are there some off-by-one mistakes?  The number of patterns in the LUT is 13, so the value of byte 0 of command 0x1A31 should be 13-1=12 (0xC), but is given as 0xD in step 3a.  Likewise, in step 3c, the number of patterns between trigger out2 pulses shown in Fig 2.9 is 3, so the value of byte 2 should be 3-1 = 0x2, but is given as 0x3.

1c. In step 5, the exposure and frame period is described as 16667 / 3 for a 60Hz vsync, but Fig 2-9 shows 4 patterns between Vsync, so shouldn't the exposure and frame period be 16667 / 4 = 4166us?

2. Regarding the buffer swap setting in bit 2 of byte 2 of command 0x1A34 (Table 2-68 on pg. 52).  When I am in pattern sequence mode 0 with video source input.  I understand that we should set this bit to be aligned with the vsync signal. I.e., the "Trigger Mode 0 Example" sets this bit for P1, P5.1, and P9.  However, if we don't set this bit, does that mean that the buffers will never be swapped?

In the V3.0.0 GUI, this buffer swap bit is not directly settable. But from looking at the source code, it seems to be determined if the Frame Index value within the Bit Plane Selection section changes from frame to frame or not.  If the frame index value stays the same, other than the first image, the buffer swap bit is not set.

So, for example, if I define a pattern sequence where only the first image has the buffer swap bit set, and all the remaining images reuses the same frame index and bit planes:

Then, after the buffer is swapped for the first image, will the same image be repeatedly projected for the whole sequence, regardless of what is coming in from the video input source?

I have confirmed that the buffer swap bit is not being set by defining DEBUG_LOG_EN in the source code.

However, the projected image (I am streaming from my PC as a second display) is constantly updated.  I.e., after starting the pattern sequence, if I move a window around on my second display, the window is shown being moved correspondingly with no delay, regardless of the length of the above pattern sequence, so the buffer seems to be swapped irrespective to the buffer swap bit.  Is this the expected behavior?

Thanks,

Edmond

  • 0
    TI__Genius 13235 points
    Hi Edmond,

    I'll look into your questions in the programmer's guide in more detail. For you questions on pattern streaming mode, the VSYNC signal is used to load in new image data on the video port. This is why you see the LightCrafter updating as you move your PC window around. Within the frame time (between VSYNC signals), then the pattern display will be according to how you set up your sequence.

    Thanks,
    Clinton
  • 0 in reply to Clinton Rodgers
    Prodigy 110 points

    Hi Clinton,

    Thanks for your reply.

    The documentation says that there are two 24-bit buffers; while the DLPC350 sends one of the buffers to the DMD array, the second buffer is filled from the RGB interface.

    So what you are saying is that in streaming mode, at every VSYNC, these buffers are swapped regardless of the buffer swap bit setting in the pattern LUT?  In other words, the buffer swap bit is only used to force a swap outside of the VSYNC periods, and ignored during the VSYNC intervals?

    Thanks,

    Edmond