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DLP Externally Triggered Frame Transition with V4100

Francesco Bausi
Prodigy 55 points
Other Parts Discussed in Thread: DLP7000, ALP

Hi,

I am using a V4100 board with a 0.7" XGA 2xLVDS (DLP7000). The controller suite is the ALP-4.2 High-Speed API library implmented in LabVIEW.

I want to display sequences of binary (1 bit) frames onto the DMD (black/white images). To synchronise the DMD with the rest of the equipment I need to use a trigger. In particular I use the DMD in Slave mode and I send a trigger signal to it (3.3V and rise/fall time ~5ns) at the pin7 (TRIGGER IN) and pin10 (GND) of the Multi-Purpose I/O connector on the V4100 Board. The trigger is received by the DMD which responds to it.

The problem is that the DMD behaves very weirdly. Depending on the trigger pulse rate (but for most of the values I have tested) during the first repetition of the sequence some of the frames (the first or the second in most of the cases) are repeated 2/3 times causing the sequence to stop halfway through, after the trigger pulses have finished. Then if the same sequence is repeated the problem is not there anymore.

I have checked that the sequence is loaded correctly and that the picture time is shorter than the time between two trigger pulses so that the DMD is ready to read the pulse.

Do you know of any particular trick to use the trigger on the V4100 board?


Thanks for your help.

Regards,

Francesco

  • 0
    Prodigy 190 points

    Hello Francesco,

    It seems to me that you might have picked the wrong trigger mode.

    The ViALUX ALP-4 API (for V4100 / V-7000) supports ALP_MASTER mode (internal timing) and ALP_SLAVE (external trigger mode, see AlpProjControl in the ALP-4 API description). The thread subject points to ALP_PROJ_STEP, which is an extended mode.

    I suggest you first try plain ALP_SLAVE mode and apply a trigger rate below ALP frame rate (i.e. trigger period > ALP PictureTime). Does it work?

    If you require ALP_PROJ_STEP feature, then please combine it with ALP_PROJ_MODE=ALP_MASTER (not slave!).

    Regarding the trigger signal voltage level: V4100 is configured for 5V IO by default. You can remove this jumper and apply your external 3.3V IO voltage to Pin1 of the I/O connector (see also V4100 Technical Reference). Unfortunately, the only other on-board choice is 2.5V.

    As this is more ViALUX topic, I would generally recommend you to directly contact us at dlp@vialux.de.

    Best Regards

    Frank

  • 0 in reply to Frank L
    Prodigy 55 points
    Hello Frank,

    Thanks for your very quick reply.

    I realised that there was a mistake in my code: I was setting the ALP_PROJ_STEP parameter while using the DMD in SLAVE MODE and this created a conflict.

    It seems to work perfectly now.

    Thanks for your help.

    Best regards,

    Francesco