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DLP9000: what is capabilities of the fpga chips on DLPC900 control board

Jong Park91
Prodigy 175 points
Part Number: DLP9000
Other Parts Discussed in Thread: DLPC900,

Hi,

I am working on a project which needs huge amount of patterns to be projected. Having a small size of memory chip on DLPC900 that can hold only about 400 images is far below of my need. So I wonder if a fpga chip on the control board can do something that is useful for my application. Is it possible to write some code on the fpga chip to control individual micromirror. If so, where can I find a manual or some example code to start?

Best,

Jong

  • 0
    TI__Guru 54285 points

    Hello Jong,

    Which EVM are you working with?

    Only the DLPLCR9000EVM has an FPGA.  This FPGA is relatively small and coordinates data going to each DLPC900 for each half of the DLP9000 DMD.

    There is pathway to what you are asking for. 

    What pattern display rate are you trying to achieve?  You might consider using Video Pattern mode which uses data streamed over a parallel RGB interface.

    Please see the EVM user guide page 27 --> http://www.ti.com/lit/ug/dlpu028c/dlpu028c.pdf

    Fizix

  • 0 in reply to Fizix
    Prodigy 175 points
    Hi Fizix,

    I am using DLPLC9000EVM. Can the FPGA chip handle some type of simple algorithm? That is main reason I want to use the FPGA chip so that I can do pattern generation and projection really fast, probably to the maximum speed of mechanical limit. If you could point out where to start that will be great.

    Video mode might be a good option too. How fast can it transfer data from computer to the board? If it is 120 Hz or something it is somewhat slow for my application since I need > 1kHz operation.

    Best,
    Jong
  • 0 in reply to Jong Park91
    TI__Guru 54285 points
    Jong,

    The FPGA is not open for modification in this way on the system.

    How many patterns do you need and do you need 24 bit RGB, 8 bit grayscale or binary patterns? This will determine the effective pattern rate.
  • 0 in reply to Fizix
    Prodigy 175 points
    Hi Fizix,

    I will be using binary patterns. Then what is the FPGA chip for?

    Best,
    Jong
  • 0 in reply to Jong Park91
    TI__Guru 54285 points

    Hello Jong,

    This FPGA coordinates the division of inbound images into data for each half of the DMD that is driven by a DLPC900.  There are two for the DLPLCR9000EVM - NOTE: the DLPLCR6500EVM only has one DLPC900 and does not use an FPGA.

    If you use Displayport input at 120 Hz RGB, then each of the 24 bitplanes can be displayed as a 1 bit (binary) pattern during each frame so that the effective binary pattern rate will be 120*24 ≈  2.88 kHz.  Note that you must pack 24 binary images into one RGB frame before it can be displayed. 

    I hope this helps.

    Fizix

  • 0 in reply to Fizix
    Prodigy 175 points
    Hi Fizix,

    Could you elaborate a bit more on 'This FPGA coordinates the division of inbound images into data for each half of the DMD that is driven by a DLPC900.' I don't quite understand what it means.

    Video mode sounds much more interesting feature than I thought. What do you by 'pack 24 binary images into one RGB frame'? When one image is projected, can it generate a trigger signal? I need to synchronize dmd pattern and a detection camera using a trigger signal.

    Best,
    Jong
  • 0 in reply to Jong Park91
    TI__Guru 54285 points

    Hello Jong,

    This is getting into internal details of the code which we do not share.  At a high level there are two DLPC900's on the controller board for the DLPLCR9000EVM and the FPGA splits the load into the two controllers when displaying an image.

    The image setup for this mode is explained in § 3.6.4 starting on page 35 of the DLP® LightCrafter™ 6500 and 9000 Evaluation Module (EVM) User's Guide --> http://www.ti.com/lit/ug/dlpu028c/dlpu028c.pdf.

    Fizix

  • 0 in reply to Fizix
    Prodigy 175 points

    Hi Fizix,

    Now I understand what FGPA does. But after I went thought the manual, found that there is a section about FPGA programming at 3.11: "3.11 Altera FPGA Programming Download the Altera Utility Tools and follow the instructions in the FPGA_Using the Serial FlashLoader_an370.pdf. To program the FPGA on the EVM use J5 and use the FPGA binary included in the DLPC900REFSW bundle." It sounds like FPGA can be programmed for some operations. I still wonder what types of functions can be programmed in FPGA. Knowing it is already programmed to split the inbound image to two DLPC900 chips, would additional programming on FPGA generate problem with the original function of splitting an image?

    I also need to know more about video pattern mode but it is not quite related to the initial title of this thread. I will just create another post about video pattern mode.

    Best,

    Jong

     

  • 0 in reply to Jong Park91
    TI__Guru 54285 points

    Hello Jong,

    This is in case the load gets corrupted the PROM can be reloaded, but we do not supply the internal FPGA code.

    Fizix

  • 0 in reply to Fizix
    Prodigy 175 points

    I see, Thank you!

    Best,

    Jong