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DLPC410: What causes the User FPGA fail to capture the RST_ACTIVE signal?

user6474208
Prodigy 80 points
Part Number: DLPC410
Other Parts Discussed in Thread: DLPA200

The User FPGA always fails to capture the RST_ACTIVE signal from DLP410 device whenever this signal is at high or low level("1"or"0" level).The pin packages are appropriate. Therefore,what's the reason?

  • 0
    TI__Guru 54705 points

    Hello User,

    Could you tell me which version of the DLPR410 PROM you are using and what operation you are performing at the time.  If during a regular mirror reset, you should be able to detect RST_ACTIVE, but in v7 if you are parking the DMD with either a Mirror Park (Float) or a PWR_FLOAT, RST_ACTIVE is not asserted.  

    Fizix

  • 0 in reply to Fizix
    Prodigy 80 points

    The version of the DLPR410 PROM we are using is DLPA200PFP,the DLPC410 version is XC5VLX30FF676 and the USER_FPGA is K7. The problem we are facing now is that no matter the reset control signal or the clear mode is provided,RST_ACTIVE output from DLPC410 is always hold on the low level,without high level at anytime. The RST_ACTIVE signal is captured using ILA IP Core. During the process, we haven't parkded the DMD with neither  a Mirror Park (Float) nor a PWR_FLOAT. In other words, the PWR_FLOAT signal is set to be 1 level.However, RST_ACTIVE is not asserted.  What's more, there are not any changes on the edges of DAD_A_STROBE and DAD_B_STROBE.

  • 0 in reply to user6474208
    TI__Guru 54705 points

    Hello User,

    PWR_FLOAT set to one will make the DLPC410 Park the system and it will NOT work.  Please set PWR_FLOAT to 0.  It is active Hi which meant when you want to power down you set it to 1.

    Fizix

    P.S.  Please download the GUI and report the version of the DLPC410.  It should be a number like 1-5 or 7.  The number you reported for the PROM is the Analog driver DLPA200.  You should find a small chip with DLPR410 on it with other numbers.

  • 0 in reply to Fizix
    Prodigy 80 points

    Hello Fizix,

            DLPR410's version  is number7.

            I replied inappropriately above.The PWR_FLOAT signal has been set to be 0 level.However, RST_ACTIVE is not asserted.  No matter the reset control signal or the clear mode is provided,RST_ACTIVE output from DLPC410 is always hold on the low level,without high level at anytime. 

           DPL9500 device can be recognized, and the DMD_TYPE signal  which is "0000"can be achieved from DLPC410 .The falling edge of the INIT_ACTIVE can also be captured during the process.

           

  • 0 in reply to user6474208
    TI__Guru 54705 points

    Hello again User,

    Is this a TI EVM or is this your own design?  It sounds like there is a signal issue causing the line to be pulled low.

    Fizix

  • 0 in reply to Fizix
    Prodigy 80 points

    Hello Fizix,

             I still have some doubts as follows:


            1.whether all rows of data must be loaded if GLOBAL RESET is requested,and whether a certain section of new row data(sequent rows of new data) can be loaded followed by GLOBAL RESET while rows without data changes retain the original data.

            2.how to control the DVALID signal to allow a section of rows to be loaded with data. Is it available to synchronize the DVALID signal with RAO_MD,ROW_AD?For instance，if only the range of 300 to 600 rows of data to be loaded, whether ROW_AD can be set from 300 to 600 while DVALID maintain high during this period.

  • 0 in reply to user6474208
    TI__Guru 54705 points

    Hello again User,

    1. Whether all rows of data must be loaded if GLOBAL RESET is requested, and whether a certain section of new row data(sequent rows of new data) can be loaded followed by GLOBAL RESET while rows without data changes retain the original data.
      1. For this device you do not have to reload all rows.  It is only necessary to update rows where there is a change of date.  Issuing a GLOBAL_RESET after that is perfectly acceptable.
    2. How to control the DVALID signal to allow a section of rows to be loaded with data. Is it available to synchronize the DVALID signal with RAO_MD,ROW_AD? For instance, if only the range of 300 to 600 rows of data to be loaded, whether ROW_AD can be set from 300 to 600 while DVALID maintain high during this period. 
      1. Yes you can.  You will have to change ROW_MODE for the first row (i.e. 300) to send the data to the address in ROW_AD.  After that you can either keep sending the next row address until row 600.  Or you can set the ROW_mode to increment from row 300 every row cycle until it automatically increments to row 600.

    Fizix