DLP660TE: Checkboard pattern and Vx1 video input

Hello Dominic,

Thank you for using the DLP E2E forums.

First I would suggest for you to use the GUI to ensure that the system is set to external mode. (see image below)

Second if you power up the system with no Vx1 card connected, do you see the DLP splash image on the DMD at startup? Are you able to use the TPG to display the various test patterns without the Vx1 card?

Regards,
Oscar

Hello Oscar, 

The GUI is set to external mode.

I can see the DMD splash image on startup with or without the Vx1 card connected. I am also able to display various test patterns. 

If I set another test pattern it gets displayed on the dmd, when I return to external mode i still get the checkboard eventhough it was not the last test pattern i used. 

Regards, 

Dominic

Dominic,

Thanks for the information.
So it sounds like whenever you set the projection mode to "External", the checkboard comes up correct?
or do you have to first enable the checkboard, then it's persistent?

Also I do have another thing for you to check.
In the "FPGA Control" sub-menu, make sure to set the "FPGA UHD VX1" to reflect the source.

Depending on the source (UHD or DMD native), you will need to set either "XPR ON UHD" or "XPR OFF 2WAY".

What it seems to me is that the controller is working as expected but there may be an issue with either the front-end or the FPGA.
To the DLPC4422 controller, the FPGA is also considered as an external source since its in the path from the front-end. 

So as I mentioned above, please check to ensure that the VX1 source is configured and that the FPGA TPG is not enabled.
Second I would recommend to reprogram the FPGA with the provided "DLP660TE_chipset_FPGA.rpd" file.

The screenshot below shows how to reprogram the FPGA.

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Regards,
Oscar

Hello Oscar, 

When I power the board on and select "EXTERNAL" as projection mode, the DMD shows nothing.

After this, I set the projection mode to "TESTPATTERN" and select "7-Checkerboard" as TPG pattern or any other pattern. The DMD displays the selected pattern.

Then I select "EXTERNAL" again and get the checkerboard (eventhough it was not necessarily the last selected testpattern) and a small part of my video input signal.

I tested your suggestions, but none of them resolved my issue.

Lastly I reprogrammed the FPGA. I do not longer get the checkerboard pattern in external everytime (sometimes it still apperars, but only on one half of the DMD) , but i also do not longer get anything of my video input signal either. When setting projection mode to "EXTERNAL" only one half of the DMD displays some kind of pattern and the other half is blank.

Best Regards,

Dominic

Dominic,

So now you have an issue with a half-image pattern when in "External" mode?
But TestPattern/Splash Image mode still works?

Also how long did it take to program the FPGA? I wonder if there may have been an issue with the programming.

Lastly if you have the capability to read the UART Serial messages, then use J26 to read the debug messages as it will give more insight as to what is going on with the EVM.

Regards,
Oscar

Hi Oscar，

When using  DLP660TE and DLPC4422 EVM development board, we also encountered similar problems.

First of all, when the system starts, the flash image is displayed, indicating that the Flash_DUAL_DLPC4422_DLP660TE_LED.img is successfully burned and the DMD is working normally.

Secondly, when programming DLP660TE_chipset_FPGA.rpd, DLPC4422GUI prompts that programming is complete. When VX1 is not connected, the version of FPGA obtained is 0.0.0. Is this correct? And the FPGA TPG has not been displayed, why?

How to set configuration parameters to display the FPGA test pattern (FPGA TPG)?

Looking forward to your reply, thank you.

Regards

Silas

Oscar, 

exactly. It looks like this (see picture) In Testpattern/Splash image mode it works as expected.

It took around 8-10 min to programm the FPGA. After encountering the problem I reprogrammed the FPGA two more times.

There was no error message. The GUI prompts that programming is complete. 

Unfortunatly we do not have those capabilities 

Regards,

Dominic

Dominic,

I apologize for the delayed response.
I was checking out the firmware that's provided on TI.com and I did see that error occur on my system as well. 

I ended up reprogramming the ASIC firmware once more and it resolved my issue. I am looking into why this could have occurred.
Have you attempted to reprogram the board again? 

Also I would double check both the flex cables and the DMD to make sure it is seated properly to the DMD board.

Regards,
Oscar

Oscar,

reprogramming the ASIC firmware did not resolve my issue. I still have the aforementioned problem.

I double checked the cable and DMD board seating. Everything should work in this regard.

Regards,

Dominic