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DLP4500: Operation of Pattern sequence mode with streaming mode

Part Number: DLP4500
Other Parts Discussed in Thread: DLPC350,

Hi,

I am using the DLP4500EVM for my application. I have some doubts after reading the user manual. Hope you can help me to let me understand the operation of pattern sequence mode with streaming mode.

I know there is an internal memory buffer with 48bit plane display buffer. When using streaming mode in pattern sequence, there will be a delay frame display at the DMD arrays. So the display image is a 24bit frame behind the data streamed.

So in streaming mode, Vsync signal is used to trigger the start of the pattern sequence projection. And the Vsync signal is sent together with the stream data. So once the Vsync signal is received, the DMD arrays will start to display the previous loaded frame and the stream data that sent together the Vsync signal will load to the next frame. Then when the next Vsync signal together with the stream data is sent, it does the same action. The DMD arrays display the previous loaded frame and the stream data will load to the next frame. Is my understanding of the operation correct?

Besides, the Vsync signal period for pattern sequence mode is 120Hz. So in streaming mode, the Vsync signal period must be less than or equal to 120Hz. We can use the trigger output signal (TRIG_OUT_1) to trigger the next Vsync signal together with the stream data and ensure that the Vsync period is not greater than 120Hz. Can my operation work like this?

Thank you.
Best regards,
Pang

  • Hello Pang,

    Welcome to DLP forum and thank your interest in DLP technology.

    Your understanding about DLPC350 internal image buffer operation  is correct. The DLPC350 has two image frame buffers. While current input frame is being stored in one frame buffer (say buffer 1)  , the controller is displaying image stored in other frame buffer (buffer 2). When it receives next Vsync signal as part of input stream , the assignment rotates. The controller starts writing into buffer 2 and starts displaying from buffer 1.

    I will not advice using Trigger out to generate Vsync because of the following reasons:

    1. The input stream has to meet parallel port timing requirement for input port to work.  Please refer to DLPC350 datasheet for details:

    www.ti.com/.../dlpc350.pdf

    2. In the streaming mode, The Vsync timing has to be with in spec ( limited jitter). Using Trigger out to generate Vsync will not guaranty that.

    The external source which streaming the input needs to ensure that it compliant with timing requirement.

    Hope this answers your question.

    regards,

    Vivek

  • Dear Vivek,

    Thanks for your reply.

    1. The input stream has to meet parallel port timing requirement for input port to work.

    I am using parallel RGB interface so it would be the Port 1 Input Pixel Interface Timing Requirements. With this datasheet details how can i calculate the parallel port timing requirement? 

    2. In the streaming mode, The Vsync timing has to be with in spec ( limited jitter).

    The Vsync timing spec is refer to not greater to 120Hz?

    Best regards,

    Pang

  • Hello Pang,

    In order to stream the content at 120Hz, you need to ensure that the input source blanking parameter (table 4, page 21)  are met and also the pixel clock is less than 150MHz (section 6.7 , page 17).

    Host processor needs to generate the data along with VSync signal.

    regards,

    Vivek

  • Dear Vivek,

    The table 4 in page 21 - 120 Hz Source Input Blanking Timings on Port 1. What does it mean of 120Hz source? Is it refer to video port input in the pattern sequence mode?

    Besides, if the pixel clock frequency is 150MHz, does it mean that the total input pixel transfer time for DLP4500 is 6.9312ms? 

    (1/150MHz)*(912*1140) = 6.9312ms 

    Best regards,

    Pang

  • Pang,

    Pixel clock frequency also includes blanking time, so total pixel count may be higher than 912x1140. The 120Hz mentioned in Table 4 refers to the input video source.

    Regards,

    Philippe Dollo

  • Hi Philippe,

    Thanks fro your reply.

    In the DLP4500EVM user manual (DLPU011F), it mention that user need to input 24bit with resolution 912x1140 data in order to operate in pattern sequence mode with video port input. How would this 24bit with resolution 912x1140 data work with the blanking time?

  • Hi Pang,

    Thank you for your patience.

    A member of our team will be able to answer your question regarding blanking by the end of the week.

    Regards,

    Austin

  • Dear Austin,

    Any update regarding the blanking transmission? Thank you.

  • Pang,

    Thanks for your patience.

    It sounds like you are confused about the blanking time that needs to be inserted into the frame. The DLPC350 (and other controllers which receive parallel video data) require a minimum blanking time in addition to the visible input resolution. The minimum blanking times required by the DLPC350 are listed in Table 4 of the DLPC350 Datasheet (https://www.ti.com/lit/ds/symlink/dlpc350.pdf).

    The sum of the horizontal displayed pixels and the blanking pixels is called the "period". Same thing goes for the vertical lines too. Putting it all together, the following video timings can be used with the DLCP350 for a 120Hz input at 912x1140 resolution:

    Pixel Clock = 146 MHz

    Horizontal:

    Resolution = 912

    Front Porch = 56

    Sync Pulse = 64

    Back Porch = 10

    Vertical:

    Resolution = 1140

    Front Porch = 17

    Sync Pulse = 10

    Back porch = 3

    So Horizonal Sync Frequency = 140.12 kHz

    Vertical Sync Frequency = 119.76 Hz

    Horizontal Period = 1042 Pixels

    Vertical Period  = 1170 Lines

    You can use a video timings calculator to check your work: https://www.epanorama.net/faq/vga2rgb/calc.html 

    I hope this helps.

    Regards,

    Philippe Dollo

  • Dear Philippe,

    Thanks for your reply.

    Yes. Now I understand how the 120Hz input works. Thank you. =)