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disable "Network Coprocessor" powerdomain after reloading outfile to DSP

Hi experts,

I'm trying to restart the Network Coprocessor after reloading an out file on an C6670 DSP.

At the first run the application will work fine.

But after a reload I get an PSC timeout error.

After the Code which I started was:

          CSL_PSC_PDSTATE pdstate=PSC_PDSTATE_OFF;
        /* Check whether PA is enabled or not */
        pdstate = CSL_PSC_getPowerDomainState (CSL_PSC_PD_PASS);

        if(pdstate != PSC_PDSTATE_OFF)
        {
            /* Turn off the PA power domain */
            {
                // Disable the domain
                CSL_PSC_disablePowerDomain (CSL_PSC_PD_PASS);
                /* Start the state transition */
                CSL_PSC_startStateTransition(CSL_PSC_PD_PASS);
                // Wait for it to finish
                while (! CSL_PSC_isStateTransitionDone (CSL_PSC_PD_PASS));
            }

        }

I got a PDSTAT2 value of 0x00000317 and a PTSTAT value of 0x00000004.

Does anyone has a glue what I can make to solve this?

Regards Frank

                                                                                                                                                                                                                                                                                                                                                                                                                                pdstat

  • Frank,

    The problem is the second time you are doing this, the PA stuck as there is some processing happening in the PDSP. To successfully shutdown the PA, always follow the steps below:

    Before the PA clock is stopped, the system must ensure that

     a.    The switch is either disabled or configured only to route traffic from Ethernet port to Ethernet port (not through CPPI)

     b.    All PDSPs are either disabled or in sleep mode

     c.    There are no expected transactions in-flight that involve PA in any way.

    Thanks,

    Arun.

  • HI Frank,

    What Arun said is correct. To implement it I recommend using the attached code. It is easier and straightforward. I keep track of the NetCP Pwr/clock domains via an internal "database" function instead of using CSL API. In every other aspect it still CSL based. Hope you find it helpful. Please read carefully through the comments.

    Regards,

    Javier

    // Initialize current Power and Clock domain states. This is an internal management data base. Does not affect actual state. See ModuleStateControl()
      init_module_states();
    
      // DO THIS AT BEGINNING OF YOUR PROGRAM
      // Enable Power Domain and Clocks (CSL VERSION)
      NetCPPwrDomainControl(PSC_PDSTATE_ON); // NetCP Power Domain
      ModuleStateControl(7, PSC_MODSTATE_ENABLE); // PA Clock Domain
      ModuleStateControl(8, PSC_MODSTATE_ENABLE); // CPSW Clock Domain
      ModuleStateControl(9, PSC_MODSTATE_ENABLE); // SA Clock Domain
    
      // DO THIS BEFORE YOU EXIT YOUR PROGRAM. MAKE SURE ALL TRANSACTIONS TO & FROM NetCP ARE COMPLETE!
      if(getNetCPPwrDomainState())
      {
      // Disable Power Domain and Clocks (CSL VERSION)
      ModuleStateControl(9, PSC_MODSTATE_DISABLE); // SA Clock Domain
      ModuleStateControl(8, PSC_MODSTATE_DISABLE); // CPSW Clock Domain
      ModuleStateControl(7, PSC_MODSTATE_DISABLE); // PA Clock Domain
      NetCPPwrDomainControl(PSC_PDSTATE_OFF); // NetCP Power Domain
      }
    
    // This function controls power and clock domains of NetCP. 
    // Input module # and desired state to transition.
    unsigned int module_states[4];
    int ModuleStateControl(unsigned int mod_num, CSL_PSC_MODSTATE next_state)
    {
    
    int status = PASS;
    int index  = -1;
            // Make sure PSC is not in process of a state transition
            while (!CSL_PSC_isStateTransitionDone (2));
    
            // User must make sure to use appropriate state for appropriate domain
            switch(mod_num)
            {
            	       
            	case 7:
                index = 1;
            	// To enable PA clock
            	if(module_states[index] != next_state && (next_state == PSC_MODSTATE_ENABLE || next_state == PSC_MODSTATE_DISABLE))
                {
                	CSL_PSC_setModuleNextState (mod_num, next_state);
                	module_states[index] = next_state;
                }
                else
                {
                	printf("UNDEFINED STATE FOR PA CLOCK DOMAIN\n");
                	status = FAIL;
                }
                break;
                case 8:
                index = 2;
                // To enable CPSW clock
                if(module_states[index] != next_state && (next_state == PSC_MODSTATE_ENABLE || next_state == PSC_MODSTATE_DISABLE))
                {
                	CSL_PSC_setModuleNextState (mod_num, next_state);
                	module_states[index] = next_state;
                }
                else
                {
                	printf("UNDEFINED STATE FOR CPSW CLOCK DOMAIN\n");
                	status = FAIL;
                }
                break;
                case 9:
                 index = 3;
                // To enable Crypto clock 
                if(module_states[index] != next_state && (next_state == PSC_MODSTATE_ENABLE || next_state == PSC_MODSTATE_DISABLE))
                {
                	CSL_PSC_setModuleNextState (mod_num, next_state);
                	module_states[index] = next_state;
                }
                else
                {
                	printf("UNDEFINED STATE FOR SA CLOCK DOMAIN\n");
                	status = FAIL;
                }
                break;
                default:
                printf("UNDEFINED NETCP CLOCK DOMAIN\n"); 
                status = FAIL;
            }
            
            if(status == FAIL)
            {
            	printf("ABORT CLOCK SETUP!\n");
            	return status;
            }
            // Initiate transition
            CSL_PSC_startStateTransition (2);
    
            // Wait until the transition process is completed.
            while (!CSL_PSC_isStateTransitionDone (2));
    
    	   
           	if(CSL_PSC_getModuleState(mod_num) != next_state)
           	{
           		switch(next_state)
           		{
           			case PSC_MODSTATE_ENABLE:
                    module_states[index] = PSC_MODSTATE_DISABLE;
           			printf("FAILED TO START ClOCK\n");
           			status = FAIL;
           			break;
           			case PSC_MODSTATE_DISABLE:
                    module_states[index] = PSC_MODSTATE_ENABLE;
           			printf("FAILED TO STOP CLOCK\n");
           			status = FAIL;
           			break;
           			default:
           			// WE SHOULD NEVER REACH THIS CODE!
           			printf("FAILED TO FILTER PROPER STATE FOR THE MODULE\n");
           		} 
           	}
    	   
    	   return status;
    }
    
    int NetCPPwrDomainControl(CSL_PSC_PDSTATE next_state)
    {
    	int status = PASS;
    	// Make sure PSC is not in process of a state transition
            while (!CSL_PSC_isStateTransitionDone (2));
            
            switch(next_state)
            	{
            		case PSC_PDSTATE_ON:  
            		// To Enable NetCP Power domain; First check if already enabled.
            		if(module_states[0] == PSC_PDSTATE_OFF)
            		{ 
            			CSL_PSC_enablePowerDomain (2);
            			module_states[0] = next_state;
            		}
            		break;
            		case PSC_PDSTATE_OFF:
            		// To Disable NetCP Power domain; First check if already disabled.
            		if(module_states[0] == PSC_PDSTATE_ON)
            		{
            			CSL_PSC_disablePowerDomain (2);
            			module_states[0] = next_state;
            		}
            		break;
            		default:
            		printf("UNDEFINED STATE FOR NETCP POWER DOMAIN\n");
            		status = FAIL;
            	}
            	
            	if(status == FAIL)
            	{
          printf("ABORT POWER DOMAIN SETUP!\n");
            		return status;
            	}
            	// Initiate transition
            CSL_PSC_startStateTransition (2);
    
            // Wait until the transition process is completed.
            while (!CSL_PSC_isStateTransitionDone (2));
            
            // Check NetCP transitioned to correct power state
            if(CSL_PSC_getPowerDomainState(2) != next_state)
    	   	{
    	   		switch(next_state)
    	   		{
    	   			case PSC_PDSTATE_ON:
                    module_states[0] = PSC_PDSTATE_OFF;
    	   			printf("FAILED TO ENABLE NETCP PWR DOMAIN\n");
    	   			status = FAIL;
    	   			break;
    	   			case PSC_PDSTATE_OFF:
                    module_states[0] = PSC_PDSTATE_ON;
    	   			printf("FAILED TO DISABE NETCP PWR DOMAIN\n");
    	   			status = FAIL;
    	   			break;
    	   			default:
    	   			printf("FAILED TO FILTER PROPER POWER STATE FOR NETCP\n");
    	   			status = FAIL;
    	   		}
    	   	}
    	   	return status;
    }
    
    
    // Initialized current state of modules to "DISABLED"
    void init_module_states()
    {
    	int i = 0;
    
    	module_states[0] = PSC_PDSTATE_OFF;
    	for(i = 1; i < 4; i++)
    	{
    		module_states[i] = PSC_MODSTATE_DISABLE;
    	}
    }
    
    unsigned int  getNetCPPwrDomainState(){
    
        return module_states[0];
    }
    

     

     

  • Hi Arun, hi Javier,

    thank you for your answers, and the code.

    I tried the suggested but I'm not able to power down the  NetCp.

    Before disabling the  clock for the packet accelerator I do the following:

    uint32_t* PDSP0_CTRL = (uint32_t*) 0x2001000;
             uint32_t* PDSP1_CTRL = (uint32_t*) 0x2001100;
             uint32_t* PDSP2_CTRL = (uint32_t*) 0x2001200;
             uint32_t* PDSP3_CTRL = (uint32_t*) 0x2001300;
             uint32_t* PDSP4_CTRL = (uint32_t*) 0x2001400;
             uint32_t* PDSP5_CTRL = (uint32_t*) 0x2001500;
             uint32_t* CPSW_CTRL = (uint32_t*) 0x2090804;

             /* disable port 0 of the Gigabit Ethernet Switch */
             *CPSW_CTRL = 0;
             /* put PDSP0 to sleep */
             *PDSP0_CTRL = 4;
             /* put PDSP1 to sleep */
             *PDSP1_CTRL = 4;
             /* put PDSP2 to sleep */
             *PDSP2_CTRL = 4;
             /* put PDSP3 to sleep */
             *PDSP3_CTRL = 4;
             /* put PDSP4 to sleep */
             *PDSP4_CTRL = 4;
             /* put PDSP5 to sleep */
             *PDSP5_CTRL = 4;

    To disable the Port 0 from the Switch ad putting the    PDSP's to sleep.

    Do I have to do more for shutting down the PA?

    Best regards

    Frank

  • Frank,

    Try disabling the PDSPs instead of just putting them to sleep. The code below will set bit 2 in each PDSP control register to 0 which should disable them.

             uint32_t* PDSP0_CTRL = (uint32_t*) 0x2001000;
             uint32_t* PDSP1_CTRL = (uint32_t*) 0x2001100;
             uint32_t* PDSP2_CTRL = (uint32_t*) 0x2001200;
             uint32_t* PDSP3_CTRL = (uint32_t*) 0x2001300;
             uint32_t* PDSP4_CTRL = (uint32_t*) 0x2001400;
             uint32_t* PDSP5_CTRL = (uint32_t*) 0x2001500;

             /* disable PDSP0 */
             *PDSP0_CTRL &= 0xFFFFFFFD;
             /* disable PDSP1 */
             *PDSP1_CTRL &= 0xFFFFFFFD;
             /* disable PDSP2 */
             *PDSP2_CTRL &= 0xFFFFFFFD;
             /* disable PDSP3 */
             *PDSP3_CTRL &= 0xFFFFFFFD;
             /* disable PDSP4 */
             *PDSP4_CTRL &= 0xFFFFFFFD;
             /* disable PDSP5 */
             *PDSP5_CTRL &= 0xFFFFFFFD;

    Jason Reeder

  • Hi Jason,

    I implemented your code but the problem is the same.

    If the program runs till the end its possible to reload the out file and start the program successfully again.

    But if I stop the program somewhere in the middle and reload the out-file the system will hang at the point where the Pa -clock should be disabled.

    regards Frank

  • Hi,

    I fixed the problem the following way.

    Before disabling the PDSP's I now teardown the 9 TX channels and the 24 RX channels.

    uint32_t* pa_padma_txchconf0 = (uint32_t*) 0x02004400;

    *pa_padma_txchconf0 |= 0x40000000;

    uint32_t* pa_padma_rxchconf0 = (uint32_t*) 0x02004800;

    *pa_padma_rxchconf0 |= 0x40000000;

    Now I can, after disabling the PDSP's, disable the clock of the PA.

    Regards Frank