We are starting development of an application that will need to communicate with an Altera Stratix 4 FPGA. It appears that there have been a lot of work done getting the C6678 to communicate with FPGAs. I was wondering if anyone has used SRIO to communicate with the Stratix 4 FPGA. If there is please post any relevant information here. If not I will use this thread to post any discoveries and or pitfalls an of course ask for TI support.
Thanks,
Jonathan