Activate all cores(1-7) form core 0 on c6678

Enrique Pollak

Hi,

I' m developing a boot system for c6678. I want to activate all cores(1-7) from core 0

I used a code from the pcieboot_helloworld example but the cores(1-7) didn't wake up.

What I miss? Can you help me?

#define DEVICE_REG32_W(x,y)   *(volatile uint32_t *)(x)=(y)
#define DEVICE_REG32_R(x)    (*(volatile uint32_t *)(x))
#define CHIP_LEVEL_REG 0x02620000
#define KICK0           (CHIP_LEVEL_REG + 0x0038)
#define KICK1           (CHIP_LEVEL_REG + 0x003C)
#define MAGIC_ADDR      0x87fffc
#define BOOT_MAGIC_ADDR(x) (MAGIC_ADDR + (1<<28) + (x<<24))
#define IPCGR(x)            (0x02620240 + x*4)
#define BOOT_MAGIC_NUMBER   0xBABEFACE

extern far uint32_t _c_int00;

    if (core == 0)
   {

        /* Unlock the chip registers */
        DEVICE_REG32_W(KICK0, 0x83e70b13);
        DEVICE_REG32_W(KICK1, 0x95a4f1e0);

        /* Writing the entry address to other cores */
        for (core = 1; core < 8; core++)
        {
           DEVICE_REG32_W(BOOT_MAGIC_ADDR(core), (uint32_t)&_c_int00);

           /* Delay 1us sec */
           cycleDelay (1000000);
        }

        for (core = 1; core < 8; core++)
        {
            /* IPC interrupt other cores */
            DEVICE_REG32_W(IPCGR(core), 1);
            cycleDelay (1000000000);
        }
    }
   else
   {
       DEVICE_REG32_W(MAGIC_ADDR, BOOT_MAGIC_NUMBER);
   }

over 12 years ago

0 ArunMani over 12 years ago

TI__Genius 9915 points

Hi Enrique,

Couple of questions

1. Are you loading this code in all the cores?

2. If yes, how are you doing it.

3. Can you connect to the CCS after the boot process? Can you check if the boot magic addres are populated correctly and what is the program counter for each core is?

Thanks,

Arun.

0 Enrique Pollak over 12 years ago in reply to ArunMani

Intellectual 360 points

Arun,

Thank you for the answer.

1. Yes I need to run the same code in all the cores

2. The code section is allocated on the External Memory, then the entry point is the same for all the cores.

3.Yes, I connected with the CCS, and I checked the Magic Address of core 1 and it was correct, according to the entry point.

How I check the Program Counter of the another cores when I connect the CCS to core 0?

Any else?

Enrique

0 Enrique Pollak over 12 years ago in reply to Enrique Pollak

Intellectual 360 points

Arun,

I have checked the Program Counter of another cores.

For example I see that after setting IPC interrupt for core1 the Program Counter of core1 reaches a wrong address 0x700b3000 (NAND / NOR memory) and doesn't care of the address set in the MAGIC ADDRESS (DDR:0x86e37200). I set a different values on the Magic Address but always core1 jumps to the same wrong addess.

Any idea? what I do wrong?

Enrique

0 Enrique Pollak over 12 years ago in reply to Enrique Pollak

Intellectual 360 points

Arun,

Thank you for the answer.

I found the problem, although I don't know exactly why.

The problem was I copied all the internal memory(512KBytes) from core 0 to another cores. And the copying of the last 256 bytes caused the problem of slave cores booting.

When I copy only 511.75 Kbytes of internal memory form core 0 to another cores, all the slaves cores start correctly. Everything Is OK.

What is in the last 256 bytes of the internal memory that is used by the boot ROM, except the 4 bytes that I know are reserved for the Boot Magic Address and I updated correctly.

Thanks,

Enrique

0 HRi over 12 years ago in reply to Enrique Pollak

Guru 10750 points

Enrique,

Please note that the ROM code reserves the last 0xD23F bytes of core "0" L2 RAM, please check sprugy5a.pdf (Bootloader user guide) paragraph 2.2 page #13,

BR,

0 Enrique Pollak over 12 years ago in reply to HRi

Intellectual 360 points

HR,

Yes, I saw on the Boot Loader doc, that in c667x the Boot Rom uses the range of internal RAM: 0x872e00 to 0x87ffff in all cores. This explains my original problem.

Thanks!

Enrique

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Activate all cores(1-7) form core 0 on c6678