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C6678 SRIO reset function

Nick li
Prodigy 30 points

I'm using the C6678 SRIO to communicate with Altera stritix IV，Program can run successfully after being loaded。

Well，I add a reset function in this program like this:

         srioRegs->RIO_PLM_EN = 0;

         while(srioRegs->RIO_GBL_EN_STAT&1);

         srioRegs->RIO_PLM_EN = 1;

         while(srioRegs->RIO_GBL_EN_STAT&1 == 0);

         srioRegs->PLM[0].RIO_PLM_SP_LONG_CS_TX1 = 0x2003F044;

After this reset program execute ,the SRIO will nolonger link up.The 0X158 register status is 0

Any mistake did I make?

  • 0
    TI__Mastermind 23525 points

    Nick,

    Please clarify what you are trying to accomplish at a higher level, for example...  are you trying to reset only the SRIO peripheral?  Are you also resetting the device?  Are you taking the peripheral out of reset isolation?  Are you rebooting?  Are you doing SRIO_init after the reset?  Are you resetting both ends of the link, i.e. the connected FPGA port too? 

    Where did you find RIO_PLM_EN and what is it controlling?

    Travis

  • 0 in reply to tscheck
    Prodigy 30 points

    Travis,

    RIO_PLM_EN is a clerical  error ,it was RIO_GBL_EN

    I'm trying to reset only the SRIO peripheral while the program is running.

    I did taking the peripheral out of reset isolation like this:

     if (CSL_PSC_isModuleResetIsolationEnabled(CSL_PSC_LPSC_SRIO))
            CSL_PSC_disableModuleResetIsolation(CSL_PSC_LPSC_SRIO); 
    if i do not did SRIO_init after the reset,lt can not link up.
    if i did SRIO_init after the reset like this:

    srioRegs->RIO_GBL_EN = 0;
    while(srioRegs->RIO_GBL_EN_STAT&1);
    srioRegs->RIO_GBL_EN = 1;
    while(srioRegs->RIO_GBL_EN_STAT&1 == 0);
    SRIO_init();
    srioRegs->RIO_PLM[0].RIO_PLM_SP_LONG_CS_TX1 = 0x2003F044;

    after i reset both ends of the link it can link up,the C6678 will stop at “output error-stopped” state,the 0x158 register is 0x20002,

    if i reload the C6678 program ,it will work OK

  • 0 in reply to Nick li
    TI__Mastermind 23525 points

    Nick,

    You may want/need to disable the SerDes during your reset too.  They are not affected by the GBL_EN, since they are device level registers, not within the peripheral.  The PDK examples do a Srio_Device_init as well as srio_init.  The SerDes registers are programmed in the Srio_Device_init.  You will need to do a complete initialization of the peripheral after the reset you are performing.  It isn't clear if you are doing this.  If you run through the same same proceedure for initialization that you did originally, you should be ok.

    A couple other things...  First, the step you highlight for

    Nick li said:
    srioRegs->RIO_PLM[0].RIO_PLM_SP_LONG_CS_TX1 = 0x2003F044;
    is used to get out of errored states.  It can only be run after Port_ok is achieved.  Take a look at the following thread and the Software recovery doc:

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/170264/675812.aspx#675812

    This proceedure should be run to cleared the errored states.  If you reset both ends of the link, you don't have to do the AckID alignment though.

    Regards,

    Travis