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Clarification on Keystone II BOOTCOMPLETe

Other Parts Discussed in Thread: 66AK2H12

The BOOTCOMPLETE pin (ball AF5 on the 66AK2H12) is somehow controlled by the bits of the BOOTCOMPLETE register. But the documentation doesn't indicate when the BOOTCOMPLETE output pin changes state. Is the pin controlled by the AND of the various BCx bits of the BOOTCOMPLETE register? Are all BCx bits required to be HIGH to cause the BOOTCOMPLETE pin to transition to HIGH? At what stage of the reset process does the BOOTCOMPLETE pin transition from HIGH Z output to being driven LOW?

  • Hi Dale 

    BOOTCOMPLETE register is set after all Core's have been released from reset to run (Core1-x are released from reset by having their BOOT MAGIC ADDRESS' written to tell the core's where to begin execution.) 

    Guess this answers  only part of your questions...

    see original post for more details

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/205999.aspx

  • Hi Ilay,

    I looked at the tms320c6678 documentation and it has exactly the same incomplete description of the BOOTCOMPLETE pin operation as the 66AK2H12 documentation. Both documents state (Section 7.2.3.9 of the 66AK2H12):

    "The BOOTCOMPLETE register controls the BOOTCOMPLETE pin status to indicate the completion of the ROM booting process."

    And neither set of documents indicate that the BOOT MAGIC ADDRESS has any any influence on the BOOTCOMPLETE pin. So I guess I still have three unanswered questions:

    • Is the pin controlled by the AND of the various BCx bits of the BOOTCOMPLETE register?
    • Are all BCx bits required to be HIGH to cause the BOOTCOMPLETE pin to transition to HIGH?
    • At what stage of the power ON/reset process does the BOOTCOMPLETE pin transition from HIGH Z output to being driven LOW?

  • Dale,

    The BOOTCOMPLETE only transitions to High once all the cores have completed booting.  This is indicated by the BCx bits.  So yes, it's effectively the AND of all the BCx bits of the BOOTCOMPLETE register. 

    As Ilay indicated the setting of the BCx bit for the respective cores happens when the BOOT_MAGIC_ADDRESS is written to, which is the last step taken after the code is bootloaded to tell the CorePac to begin execution of the bootloaded code, which the entry point is what's written to the BOOT_MAGIC_ADDRESS.

    The BOOTCOMPLETE pin will transition from High-Z to driven low when the device is released from Reset - This would be by the time the RESETSTAT transitions high indicating it's been released from Reset during a Power On Reset/Power Sequence.

    Best Regards,

    Chad