Hi:
I am developing applications on the EVMC6678L REV.3A, and I encountered some multicore bootting issues. It seems that my board refuses to boot from an MAD-generated image that is written into the NOR or NAND flash.
I am using MCSDK2.0.6.18 and CCS5.1.1, and my CGT is ver.7.3.1, which is installed along with the CCS.
I am trying to download the onboard “mcip-c6678-le.bin” file in the image processing demo into the NOR flash, and then boot from the NOR flash. I have followed the “MAD user-guide”:
http://processors.wiki.ti.com/index.php/MAD_Utils_User_Guide#Debugging_application_on_target;
Here is what I did:
- I did NOT re-generate “mcip-c6678-le.bin”, which is under the folder :
E:\ti\mcsdk_2_00_06_18\demos\image_processing\utils\mad\evmc6678l\images
- No modifications on any of the eeprom writer or Nor flash writer.
- Turn the switches on the board to “no boot mode”
- Modify lines of “i2cConfig.gel” according to the MAD user guide, which is under:
E:\ti\mcsdk_2_00_06_18\tools\boot_loader\ibl\src\make\bin
ibl.bootModes[0].u.norBoot.bootFormat = ibl_BOOT_FORMAT_BBLOB; /*ibl_BOOT_FORMAT_ELF;*/
ibl.bootModes[0].u.norBoot.bootAddress[0][0] = 0; /* Image 0 NOR offset byte address in LE mode */
ibl.bootModes[0].u.norBoot.bootAddress[0][1] = 0xA00000; /* Image 1 NOR offset byte address in LE mode */
ibl.bootModes[0].u.norBoot.bootAddress[1][0] = 0; /* Image 0 NOR offset byte address in BE mode */
ibl.bootModes[0].u.norBoot.bootAddress[1][1] = 0xA00000; /* Image 1 NOR offset byte address in BE mode */
ibl.bootModes[0].u.norBoot.interface = ibl_PMEM_IF_SPI;
ibl.bootModes[0].u.norBoot.blob[0][0].startAddress = 0x9E000000; /* Image 0 load start address in LE mode */
ibl.bootModes[0].u.norBoot.blob[0][0].sizeBytes = 0xA00000; /* Image 0 size (10 MB) in LE mode */
ibl.bootModes[0].u.norBoot.blob[0][0].branchAddress = 0x9E001040; /* Image 0 branch address after loading in LE mode */
5. Connect the board with my PC with the onboard XDS100v1 Jtag and load my “.ccxml” with which “Evmc6678l.gel” is attached, so, no problem for DDR memory initialization.
6. Connect core 0 and load “i2cparam_0x51_c6678_le_0x500.out” to modify IBL configuration, it seems OK.
7. Load “norwriter_evm6678l.out” and write the “mcip-c6678-le.bin” to the flash according to “readme.txt”, it seems OK.
8. Then I disconnect the board and turn the switches to “IBL NOR boot on image 0” mode, repower the board, but it seems that the image processing program is not running, I only get following messages from a COM receiver:
IBL version: 1.0.0.13
IBL: PLL and DDR Initialization Complete
IBL Result code 00
IBL: Booting from NOR
Other information:
- I tried to load “mcip-c6678-le.bin” to the DDR3 and run according to “Loading and running MAD linked image using CCS” in the user guide, but I got nothing.
- I tried to rebuild “mcip-c6678-le.bin” and write it to NAND or NOR flash, but with no luck.
- I tested the NAND and NOR boot when I got the board, and it looked fine.