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Triggering EDMA from GPINT

Keith Elliott
Intellectual 890 points

I've been having some trouble attempting to set up a DMA that is triggered by a GPIO interrupt, specifically GPINT8, on a C6678.  Going through the documentation in the datasheet and CIC User Guide, I can understand how interrupts are generally routed, and how to map the GPINT from a System Interrupt to a Host Interrupt.  However I can't seem to figure out how to map this Host Interrupt to one of the EDMA channels/events.  I see that there are CICx_OUTn EDMA events but can't find any documentation about how to trigger these.  Is there any documentation or example code that someone can point me towards to explain how to implement this?

Thanks!

  • 0
    TI__Guru* 81335 points

    The following thread discussed about UART/CPU interrupt and also UART RX and EDMA CSL setup.

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/225788.aspx?pi168778=2

    Hope it could help with your issue as well. 

  • 0
    TI__Mastermind 35645 points

    Hi,

    Thanks for your post.

    I think, You should refer the C6678 interrupt topology from the datasheet, Figure 7-31 below:

    http://www.ti.com/lit/ds/symlink/tms320c6678.pdf (refer sections 7.10.1, 7.10.2)

    From the above datasheet, kindly refer Figure 7-32 which shows the mapping of system events. Kindly check for system event inputs no's from 82 to 90 from Figure 7-32. Also, Please check the below Tables for GPIO Interrupts event mapping to CIC2, CIC3, EDMACC1, EDMA3CC2 from the datasheet doc. above:

    Table 7-36  for EDMA3CC1 Events for C6678 (event no's 6 to 13)

    Table 7-37 EDMA3CC2 Events for C6678 (event no's 6 to 13)

    Table 7-40 CIC2 Event Inputs (Secondary Events for EDMA3CC1 and EDMA3CC2) (CIC input event no's 0 to 7)

    Table 7-41 CIC3 Event Inputs (Secondary Events for EDMA3CC0 and HyperLink) (CIC input event no's 0 to 15)

    For more information on the Interrupt Controller, see the C66x DSP CorePac User Guide below:

    http://www.ti.com/lit/ug/sprugw0c/sprugw0c.pdf

    Kindly refer section 9.3 for C66x Corepac Events and check Table 9-2 for System event mapping.

    For more details on the CIC features, please check the Chip Interrupt Controller (CIC) for KeyStone Devices User Guide below:

    http://www.ti.com/lit/ug/sprugw4a/sprugw4a.pdf

    All DMA/QDMA channels can be set to assert an EDMA3CC completion interrupt to the DSP on transfer completion, by appropriately configuring the PaRAM entry associated with the channels. For more info. on interrupt register, kindly refer section 4.2.7 from the keystone EDMA user guide below:

    http://www.ti.com/lit/ug/sprugs5b/sprugs5b.pdf

    Thanks & regards,

    Sivaraj K

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  • 0 in reply to Sivaraj Kuppuraj
    Intellectual 890 points
    Thanks! An additional pass over the documentation made everything click. I didn't realize EDMA channels were the same as events.