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C6678 using multicore



Hi,

We are using C6678 to do signal processing. We've been using core0. Now to improve performance, we would like to enable 3~4 more cores. Is there a document describing how to enable other cores and how to setup those cores? For example, do I need to load any boot image to those cores? If so, can I load the same boot image that runs in core0? etc.

Thanks,

Hong

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  • Hi Hong Li,

    Apologize for the delay.

    Is there a document describing how to enable other cores and how to setup those cores? For example, do I need to load any boot image to those cores? If so, can I load the same boot image that runs in core0? etc.

    Please refer bootloader user guide from below link.

    Yes. The secondary cores should be wake up primary core which is core0 then can load same image to each or different images to each core. If the same image has been loaded across multiple cores the execution belongs each core can be controlled by reading DNUM register(which is core id register).

    Please refer the example attached in below post for more information.

    Thank you.

  • Hi Rajasekaran,

    Thank you for the information.

    Hong Li
  • Hi Rajasekaran,

    I do I set the EVM to no boot mode and which gel file do I use to init the core0?

    Thanks,
    Hong
  • Please find the gel file from here,

    ~\ti\ccsv6\ccs_base\emulation\boards\evmc6678l\gel

    Thank you.
  • Hi Raja,

    Sorry I made a typo. How do I set no boot mode?

    Thanks,
    Hong
  • Hi Raja,

    Please ignore my previous question. I was able to run the example file. But I still have a couple of questions.
    1. I would like to add some printf in the write_boot_magic_number() function so that I can see message from other cores but nothing is displayed. Do you know the reason to it?
    2. Do you know how I can debug the other core?

    Thanks,
    Hong
  • Hi Hong,

    Can you please share the linker command file used for above example testing?

    Thank you.

  • /******************************************************************************
     * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com
     * 
     *  Redistribution and use in source and binary forms, with or without 
     *  modification, are permitted provided that the following conditions 
     *  are met:
     *
     *    Redistributions of source code must retain the above copyright 
     *    notice, this list of conditions and the following disclaimer.
     *
     *    Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the 
     *    documentation and/or other materials provided with the   
     *    distribution.
     *
     *    Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
     *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
     *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
     *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
     *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
     *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
     *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
     *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     * 
     *****************************************************************************/
    /*
     *  Linker command file
     *
     */
    
    -c
    -heap  0x2000
    -stack 0x2000
    
    /* Memory Map 1 - the default */
    MEMORY
    {
        DDR (RWX) : org = 0x80000000, len = 0x20000000
    }
    
    SECTIONS
    {
        .text:_boot_entry > DDR
        .csl_vect   >       DDR
        .cppi       >       DDR
        .linkram    >       DDR
        .mac_buffer >       DDR
        platform_lib >      DDR
        .text       >       DDR
        GROUP (NEAR_DP)
        {
        .neardata
        .rodata 
        .bss
        } load > DDR
        .stack      >       DDR
        .cinit      >       DDR
        .cio        >       DDR
        .const      >       DDR
        .data       >       DDR
        .switch     >       DDR
        .sysmem     >       DDR
        .far        >       DDR
        .testMem    >       DDR
        .fardata    >       DDR
    }