Hello
Our K2H EVM board has encountered the BMC power failure issue. My previous post is here (link here). Thanks to the TI employee Raja. He had provided us the up to date information about this BMC power failure issue. According to his latest suggestion, We tried the the version "UCD9244_52_A05, UCD9090_104_A04, and UCD9244_78_A04" in this post. However, the K2H EVM still cannot be powered up. By using the function "get version" in the bmc_tool.py, we can get the version read from the K2H EVM is showing that:
After power-on the EVM, BMC message is showing below.
Thanks Xining Yu
BMC VERSION 1.0.2.6
BUILT Nov 5 2013 13:06:10
---------------------
[00:00:00] BMC Init Begin
[00:00:00] BMC Version 1.0.2.6
[00:00:00] XTCIEVMK2X
[00:00:00] 4.0
[00:00:00] S/N: 108259
[00:00:00] BMC Init Complete
[00:00:00] Main PWR Start Begin
[00:00:00] Main PWR Start Complete
[00:00:00] SOC PWR Start Begin
[00:00:00] Testing register 0 of clock 1... Passed.
[00:00:00] Testing register 1 of clock 1... Passed.
[00:00:00] Testing register 2 of clock 1... Passed.
[00:00:00] Testing register 3 of clock 1... Passed.
[00:00:00] Testing register 4 of clock 1... Passed.
[00:00:00] Testing register 5 of clock 1... Passed.
[00:00:00] Testing register 6 of clock 1... Passed.
[00:00:00] Testing register 7 of clock 1... Passed.
[00:00:00] Testing register 8 of clock 1... Passed.
[00:00:00] Testing register 9 of clock 1... Passed.
[00:00:00] Testing register 10 of clock 1... Passed.
[00:00:00] Testing register 11 of clock 1... Passed.
[00:00:00] Testing register 12 of clock 1... Passed.
[00:00:00] Testing register 13 of clock 1... Passed.
[00:00:00] Testing register 14 of clock 1... Passed.
[00:00:00] Testing register 15 of clock 1... Passed.
[00:00:00] Testing register 16 of clock 1... Passed.
[00:00:00] Testing register 17 of clock 1... Passed.
[00:00:00] Testing register 18 of clock 1... Passed.
[00:00:00] Testing register 19 of clock 1... Passed.
[00:00:00] Testing register 20 of clock 1... Passed.
[00:00:00] Clock 1
[00:00:00] Passed
[00:00:00] Testing register 0 of clock 2... Passed.
[00:00:00] Testing register 1 of clock 2... Passed.
[00:00:00] Testing register 2 of clock 2... Passed.
[00:00:00] Testing register 3 of clock 2... Passed.
[00:00:00] Testing register 4 of clock 2... Passed.
[00:00:00] Testing register 5 of clock 2... Passed.
[00:00:00] Testing register 6 of clock 2... Passed.
[00:00:00] Testing register 7 of clock 2... Passed.
[00:00:00] Testing register 8 of clock 2... Passed.
[00:00:00] Testing register 9 of clock 2... Passed.
[00:00:00] Testing register 10 of clock 2... Passed.
[00:00:00] Testing register 11 of clock 2... Passed.
[00:00:00] Testing register 12 of clock 2... Passed.
[00:00:00] Testing register 13 of clock 2... Passed.
[00:00:00] Testing register 14 of clock 2... Passed.
[00:00:00] Testing register 15 of clock 2... Passed.
[00:00:00] Testing register 16 of clock 2... Passed.
[00:00:00] Testing register 17 of clock 2... Passed.
[00:00:00] Testing register 18 of clock 2... Passed.
[00:00:00] Testing register 19 of clock 2... Passed.
[00:00:00] Testing register 20 of clock 2... Passed.
[00:00:00] Clock 2
[00:00:02] Passed
[00:00:02] Testing register 0 of clock 3... Passed.
[00:00:02] Testing register 1 of clock 3... Passed.
[00:00:02] Testing register 2 of clock 3... Passed.
[00:00:02] Testing register 3 of clock 3... Passed.
[00:00:02] Testing register 4 of clock 3... Passed.
[00:00:02] Testing register 5 of clock 3... Passed.
[00:00:02] Testing register 6 of clock 3... Passed.
[00:00:02] Testing register 7 of clock 3... Passed.
[00:00:02] Testing register 8 of clock 3... Passed.
[00:00:02] Testing register 9 of clock 3... Passed.
[00:00:02] Testing register 10 of clock 3... Passed.
[00:00:02] Testing register 11 of clock 3... Passed.
[00:00:02] Testing register 12 of clock 3... Passed.
[00:00:02] Testing register 13 of clock 3... Passed.
[00:00:02] Testing register 14 of clock 3... Passed.
[00:00:02] Testing register 15 of clock 3... Passed.
[00:00:02] Testing register 16 of clock 3... Passed.
[00:00:02] Testing register 17 of clock 3... Passed.
[00:00:02] Testing register 18 of clock 3... Passed.
[00:00:02] Testing register 19 of clock 3... Passed.
[00:00:02] Testing register 20 of clock 3... Passed.
[00:00:02] Clock 3
[00:00:02] Passed
[00:00:02] SOC PWR Start Complete
[00:00:02] SOC RST Begin
[00:00:02] Current BootMode is set to DSP No-Boot
[00:00:02] SOC RST Complete
[00:00:02] BOOT COMPLETE
[00:00:04] Error: SOC_POWER_GOOD signal has de-asserted. Shutting down soc power.
[00:00:04] Full Reset Begin
[00:00:04] Full Reset Complete
[00:00:04] POR Begin
[00:00:04] POR Complete
[00:00:04] SOC PWR Stop Begin
[00:00:04] SOC PWR Stop Complete
