• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 99 subscribers
  • Views 750 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AES Decryption on DM814x / DM81xx

K Md Feroz Irfan
Expert 7225 points

Hello Champs,

Kindly clarify on the AES support for DM81xx?

Is the HW Acceleerator available?

If not, what are the metrics for the software solutions that we provide? How many cycles are needed per MB?

Kindly clarify.

Best Regards

Feroz

  • 0
    TI__Prodigy 260 points

    Feroz,

    Yes, the hardware crypto accelerators are available on DM81xx.  For more information, check Installing AM389x C6A816x DM816x Crypto Support or Installing AM387x C6A814x DM814x Crypto Support on the Wiki.

    Best regards,

    Herman Schuurman

  • 0 in reply to Herman Schuurman
    TI__Expert 7225 points

    Hi Herman,

    Thanks. This is really good.

    Do we have some performance numbers from  using the cryptotest?

    is there a design guide which explains which part is HW and which SW? 

    Also, lets say I want to use the SW AES decryption and in general Decryption/encryption, what MIPS are needed? Say on Cortex A8 and on c674x DSP? is there any Wiki on this? Kindly let me know.

    Thanks  & Best Regards

    Feroz

  • 0 in reply to K Md Feroz Irfan
    TI__Prodigy 260 points

    Hi Feroz,

    The performance numbers from cryptotest are given at the end of the installation instructions I mentioned.

    The hardware crypto addendum is only available under a non-disclosure agreement, but you can derive a lot of information from the publicly available source code for the crypto API drivers.

    I don't have performance figures available on the crypto software for the Cortex A8, but you can compile OpenSSL with cryptodev support disabled, in which case you will use the software crypto implementations only.  For the C64x+ DSP architecture we have an AES implementation available at http://www.ti.com/tool/c64xpluscrypto.  It only provides the basic ECB mode, but wrapping other operating modes around it should be simple.

    Performance figures for the C64x+ AES implementation are roughly (expressed in processor cycles per 128-bit data block):

    Key SizeEncryptDecrypt
    128 195 197
    192 227 229
    256 259 261

    In addition there is a one-time key schedule computation for each new key, comparable in performance to a single data block encryption.  Decrypting 1MB will take about 13Mcycles, 15Mcycles, and 17Mcycles for 128, 192, and 256 bit keys respectively (the key schedule computation becomes negligible for larger amounts of data processed with the same key).

    Best regards,

    Herman Schuurman