DM8148 I2C3 does not work

hi Steve,

We have 4 instances of the I2C module in DM8148: I2C0, I2C1, I2C2 and I2C3. I2C0 and I2C2 are active by default, but I2C1 and I2C3 are not. I2C1 and I2C3 can be switched on when you supply these with clock signal, through writing in the PRCM register CM_ALWON_I2C_1_CLKCTRL (address 0x48181568) the value of 0x00000002. Thus the I2C1 and I2C3 registers can be accessible for read/write operations.

This CM_ALWON_I2C_1_CLKCTRL register can be found in the linux kernel source code under the name TI814X_CM_ALWON_I2C_13_CLKCTRL.

After you enable the I2C3 instance of the I2C module, you should select the I2C3 signals (i2c3_scl and i2c3_sda) to be routed on the device pins. This I2C3 signals select procedure can be done on mux0 (register PINCNTL22/23), mux1 (register PINCNTL68/69), mux2 (register PINCNTL158/159) or mux3 (register PINCNTL213/214), depending on your application needs.

Best regards,

Pavel

Hi Pavel,

Thanks for your reply. If I use your index, I am testing I2C2 and it does not work. From the source codes in ezsdk5.04, I could not see the correct codes to use I2C2. The following codes in  clock814x_data.c does not setup the I2C2 fclk well, so it could not set the speed in i2c driver. Is it right?  

CLK("omap_i2c.1", "fck", &i2c1_fck, CK_TI814X | CK_DM385),
CLK("omap_i2c.2", "fck", &i2c2_fck, CK_TI814X | CK_DM385),
CLK(NULL, "i2c3_fck", &i2c3_fck, CK_TI814X | CK_DM385),  -----> I2C2 by your index
CLK("omap_i2c.4", "fck", &i2c4_fck, CK_TI814X | CK_DM385),

hi Steve,

The I2C2 has one clock coming from the PRCM, and this clock serve as interface and functional. And this clock is enabled here:

CLK("omap_i2c.3", "ick",&i2c3_ick, CK_TI814X | CK_DM385),

Please check your CM_ALWON_I2C_0_CLKCTRL register value, it should be 0x00000002.

One question, by saying that I2C2 does not work, do you mean that you can not access (read/write) its registers?

Best regards,

Pavel

Hi Sreve,

This portion of the code enable i2c2 clock and this code called before driver enabled so no issues with the clock.

static inline void ti814x_enable_i2c2(void)
{
struct clk *fclk;

fclk = clk_get(NULL, "i2c3_fck");
if (!IS_ERR(fclk))
clk_enable(fclk);
else
printk(KERN_WARNING "clk get on i2c3 fck failed\n");
}

If you are not able to access the address space of i2c2 then we can say, that particular clock is not enabled. Check with pinmux settings.

Regards

AnilKumar

Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question.  Thanks!

Hi Anil,

  That's the problem.  We could see the following code in driver/i2c/buses/i2c-omap.c

fclk = clk_get(dev->dev, "fck");

Could we get the I2C3 fclk here? Why do we have to enable I2C3 fclk in a specified function?

Actually I modify the codes to enable and test I2C1, I2C3 and I2C4. When I select  I2C1 and I2C4, I can communicate with I2C device and I got a 100KHz clock on i2c_scl. When I select I2C3, I can not communicate with the device and I get only 97.5K Hz on i2c_scl. If someone can use I2C3 to communicate I2C device, maybe we can check our design and layout again.   

Hi Pavel,

    I can access its register, but I can not access I2c device from I2C3 bus. The I2C3 iclk is correct. As my response to Anil, I got the strange i2c_clk on I2C3 bus.

hi Steve,

On which PINCNTLx registers you are routing your i2c3_scl and i2c3_sda signals? By default, registers PINCNTL74 and PINCNTL75 are doing this job. Their value should be 0x00060020.

Also, the i2c_scl signal is controlled with the I2C_PSC register. Could you please double check its value.

Best regards,

Pavel

Hi Pavel,

    We use PINCNTL135 and PINCNTL156 instead of PINCNTL74 and PINCNTL75. And I set the value to 0x60040 to PIN135 and 0x60020 to PIN156.  The value is 0xb  in I2C_PSC register.  SCLL is 0xd and SCLH is 0xf.  Any suggestion?

Steve

Hi Steve,

Could you please try with these values:

PSC = 0x3

SCLL = 0x8

SCLH = 0xA

BR,

Pavel

Hi, Steve.

Have you seen this post?

http://e2e.ti.com/support/embedded/linux/f/354/t/151018.aspx

Hi Pavel,

 Is the I2C speed 100K, if I set these value? What's your function clock? In my case, the function clock is 48Mhz.

 Steve

Hi Alexander,

 Yes, I saw the post. But I did not load the M3 firmware and driver when I tested the I2C driver with i2c utility. I can also run load_firmware with "-i2c 0" option to diable i2c function on M3.

Perhaps, the original pins are still muxed with I2C3. Tracing from the ti814x_evm_i2c_init() call:

arch/arm/mach-omap2/board-ti8148evm.c:ti814x_evm_i2c_init(void)
arch/arm/plat-omap/i2c.c:omap_register_i2c_bus(int bus_id,...)
arch/arm/plat-omap/i2c.c:omap_i2c_add_bus(bus_id)
arch/arm/plat-omap/i2c.c:omap2_i2c_add_bus(bus_id)
arch/arm/plat-omap/i2c.c:omap2_i2c_mux_pins(bus_id)
  if (cpu_is_ti814x() && bus_id == 3) {
    sprintf(mux_name, "uart0_dcdn.i2c2_scl_mux0");
    omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
    sprintf(mux_name, "uart0_dsrn.i2c2_sda_mux0");
    omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
  } else {
    sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id);
    omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
    sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
    omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
  }

In theory, The ti814x_evm_i2c_init() call should take care of all the clocks and mux. If you want to used that function, I think you will need to change

uart0_dsrn.i2c2_sda_mux0 -> vin0_de0_mux0.i2c2_sda_mux1
uart0_dcdn.i2c2_scl_mux0 -> vin0_d16.i2c2_scl_mux1

Hi Norman,

  Thanks. I modified these codes already. I used devmem2 to dump the mux control registers and these values are correct

Steve 

Hi Norman,

  Thanks. I checked PINCNTL74 and PINCNTL75. They were routed to I2C too, but I did find any codes to modify them in u-boot and kernel. I will find it out.

Steve 

You should unverify my reply. The TI guys might wander away if you still have problems. Maybe check for HW probs as well like external pull up resistors. I'm not familiar with this processor. Don't know if I2C3(or I2C[2] in the TRM) has internal pullups.

Hi Norman,

      I found that HDMI uses these I2C pins. EzSDK 5.04 can prevent M3 processor to use the I2C port and I just need to comment these codes to route these pins to I2C.

Now I can use this I2C port. How can I tell TI guys? 

Vaguely remember some mention by yihe about HDMI and pinmux:

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/179780/653183.aspx#653183
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/146722/650761.aspx#650761

Hopefully yihe will comment about your problem.