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Cache Misses Counter?

Joern
Genius 3055 points

I wonder if there is any counter in the C674x which deliveres cache misses.

Background:

  • working on dm8148, so the DSP part is a C674x
  • programming by use of EZSDK 5.04.00.11
  • the software running on DSP is packed into a codec server for the C674x
  • called from ARM side via the codec engine mechanism

For the DSP side software I need to compare several optimization results. Time measurement is no problem (TSCL/TSCH), but what I am missing is a counter for cache misses, to get an idea how expensively a code part is concerning memory use...

I stumbled over AET, but yet I did not find there what I'm looking for. The use of CCS for profiling is not possible.

Thanks in advance for any hint,
kind regards,
Joern.

  • 0
    Genius 3055 points

    No hint, not even "the" any hint?

    1) Is there a cache misses counter which can be read from the code running on DSP?

    2a) If 1) yes, how to enable and access?

    2b) If 1) no, could any existing event mechanism be used to maintain such a counter?

    Thanks in advance,
    Joern.

  • 0 in reply to Joern
    TI__Guru** 116170 points

    Joern,

    Refer to the Unified Break point manager (UBM) tutorial that is given on the wiki here:

    http://processors.wiki.ti.com/index.php/Unified_Breakpoint_Manager

    The tutorial shows how to set counters to catch cache misses. The tutorial is on a different device so I am not sure if your device supports it but if the UBM options in CCS doesn`t show up, it might indicate that this is not supported. Perhaps you should also post on the CCS forums to see if emulation experts can help you find if this feature is supported.

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Genius 3055 points

    Hi Rahul,

    maybe one day again I'll have to give CCS a try. All around the UBM looks not bad. But in the past I hat lots of trouble to get CCS running (one of the first CCSv5 at Linux), that was trouble concerning robustness of the CCSv5 (it crashed too often) and also because I didn't get it (at least not "on the fly") to handle a million-lines pure makefile based project by CCS.

    But your hint lead me back to have a closer look on AET, which I stumbled over two days ago.

    And I will do so, maybe it provides what I need: get a cache misses counter without use of CCS.

    At least this looks like that was possible.

    I'll post here if I was successfully,
    until then I am gratefully for each further hints,

    Joern.