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TI8148 McASP4

Other Parts Discussed in Thread: WL1271, TVP5158

Hi all,

On our custom board based on TI8148 using TI EZSDK 5.05.01.04, I need to configure McASP4 to be used as an audio receiver from a HDMI chip.

The MCLK, bit clock and frame clock are output from the HDMI chip.

And I had probed these signals and they are being output from the HDMI receiver to TI8148.

However, I'm encountering "ALSA sound/core/pcm_lib.c:1765: capture write error (DMA or IRQ trouble?)" when I used arecord to try to capture from McASP4.

Understood it as timeout when waiting for PCM stream. Seem like no data is streaming into the DMA.

I had went through these 2 posts (http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/246455.aspx & http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/229575.aspx) that have this problem but their solutions do not work on my board.

I read from "TI81XX_EDMA_Driver_User_Guide" page 4 on "Present configuration of EDMA3 resources on DM814X platform".

As McASP4 AREVT DMA channel is 63, is this channel being used by DSP?

I had modified ../arch/arm/mach-omap2/devices.c ti814x_dma_rsv_chans[][2] by changing {56, 8} to {56, 6} and ti814x_dma_rsv_slots[][2] similarly.

Does this free up this channel from DSP?

Or McASP4 is not available for usage by A8?

Or is there anything on L4 need to be setup since McASP4 data port is on L4?

On sprs647d TMS320DM814x DaVinci Digital Video DataSheet, page 321, address range for McASP3/4/5 for BUFFER_CFGRD_RFIFO_STS have address 0x0A1A 300C/ 0x0A1A 900C/ 0x0A1A F00C. 

Is this a typo error? As McASP3/4/5 address started from 0x4A1AXXXX.

Thank you for any help.

Regards

May

  • hi    does your mcasp4 work?

  • Hi, we didn't use MCASP4 anymore as our hardware had changed to MCASP0 therefore didn't continue with making MCASP4 work.

  • ok,can you tell me how do you know the mcasp4 use dma channel 62-63 or you choose it by yourself?  i want  use mcasp4  can you give me some suggestions  



                                                                                                                                                               
                      thanks

  • The DMA channel is indicated in the document sprs647d "TMS320DM814x DaVinci Video Processors Data Sheet" page224.

  • thanks,i have another question? how can i caculate the tx_dma_offset  and  rx_dma_offset like those as follows :

    static struct snd_platform_data ti8148_evm_snd_data = { 
    .tx_dma_offset = 0x46800000,
    .rx_dma_offset = 0x46800000,

     

  • The addresses are available in the SPRS647D data sheet on page 23.

    The details are in SPRUGZ TMS320DM814x DaVinci Digital Video Processors Technical Reference Manual page 2030.

  • i find it .
     when i  use aplay  i  have the same problem with you
     playback write error (DMA or IRQ trouble?)

    did your aplay  work ?

  • same situation, when I used aplay, it reported the write error (DMA or IRQ trouble?) message.

    Did you try this "I had modified ../arch/arm/mach-omap2/devices.c ti814x_dma_rsv_chans[][2] by changing {56, 8} to {56, 6} and ti814x_dma_rsv_slots[][2] similarly."

    Read from somewhere that states this channel is reserved for DSP.

    For my end, its really no data coming into the MCASP4 channels as my HW had changed to MCASP0 but the schematics given out was not the latest.

    After which, I didn't work on the MCASP4 further.

  • yeah,i have changed the   ../arch/arm/mach-omap2/devices.c ti814x_dma_rsv_chans[][2] from {56, 8} to {56, 6} and   ti814x_dma_rsv_slots [][2] from {56, 8} to  {56, 6} .  the result is  the write error (DMA or IRQ trouble?) ?

    did you change the  ti814x_dma_rsv_slots ? and what is the sysclk for codec ?

    it seems that  TI does not use dma channel 62 and 63 for mcasp4  neither test the mcasp4. i really want to use the mcsp4 for wl1271 bt pcm .  unlucky!

    and do you have a good way to debug mcasp?

  • Yes, I did changed the ti814x_dma_rsv_slots to remove those slots for MCASP4 from DSP reserve list.

    For my project, only a DAC is used, so the MCASP0 AHCLKX is used to generate the master clock to the device. The source of the master clock is DEVOSC 20MHz.

    During my initial work on MCASP4, I found the following misleading hence I posted on this forum but there wasn't any responses:

    "On sprs647d TMS320DM814x DaVinci Digital Video DataSheet, page 321, address range for McASP3/4/5 for BUFFER_CFGRD_RFIFO_STS have address 0x0A1A 300C/ 0x0A1A 900C/ 0x0A1A F00C. 

    Is this a typo error? As McASP3/4/5 address started from 0x4A1AXXXX."

    This will affect where the address space to grab data (probably).

    Maybe TI Engineer could help to confirm this.

    As for debugging, my board doesn't have any JTAG connector mounted so its old-style kernel printouts debugging and using oscilloscope to probe the AXR pin to ensure there are audio data, and check all those clocks (master clock, wclk , bclk).

    You could check these 2 posts to see if it helps:

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/246455.aspx http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/229575.aspx

    At the end, my project uses MCASP0 and MCASP2 instead since MCASP4 seems not tested based on the forum posts I read last time.

  • thanks , at last  my mcasp4 does work ~ 

  • That's great news!

    Do you mind sharing how did you get MCASP4 to work? Are there some steps that was missing??

  • i think you may miss nothing ,it may be your mcasp4 register's error ;the key change as follows:

    static struct resource ti81xx_mcasp_resource[] = {

    {
    .name = "mcasp",
    .start = TI81XX_ASP4_BASE, //it is   #define TI81XX_ASP4_BASE 0x4A1A8000


    .end = TI81XX_ASP4_BASE + (SZ_1K * 12) - 1,
    .flags = IORESOURCE_MEM,
    },
    /* TX event */
    {
    .start = TI81XX_DMA_MCASP4_AXEVT, //62 
    .end = TI81XX_DMA_MCASP4_AXEVT,
    .flags = IORESOURCE_DMA,
    },
    /* RX event */
    {
    .start = TI81XX_DMA_MCASP4_AREVT, //63 
    .end = TI81XX_DMA_MCASP4_AREVT,
    .flags = IORESOURCE_DMA,
    },
    };

    ti814x_dma_rsv_chans[][2]   {56, 6},

    ti814x_dma_rsv_slots[][2]  {56, 6}.

    snd_platform_data ti8148_evm_snd_data  = {

    .tx_dma_offset = 0x4A1AB000,

    .rx_dma_offset = 0x4A1AB000,

    }

    so  you can check yours 

    when i  find the error  DMA IRQ or  ?,i use codec as master and mcasp4 slave,it cause my codec didnot generate fyck and aclkx clk ;

  • Noted, thanks for sharing.

    Can't check mine as not using MCASP4 but good to know for future products.

  • Hi,

    I has learned the DM8148 for a short time. I want to connect a tvp5158 to the McASP4 ports of DM8148 to capture  single channel audio signal now. Can you describe the driver of the McASP4 specifically? Thank you very much!