In DM8148 datasheet revised Sep 2012
Table 8-44 Timing requirements for I2C Input Timings
#9, #10, #11 & #12 : Rise and fall times
Is this assuming a10-90% voltage swing for transition time?
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In DM8148 datasheet revised Sep 2012
Table 8-44 Timing requirements for I2C Input Timings
#9, #10, #11 & #12 : Rise and fall times
Is this assuming a10-90% voltage swing for transition time?
It's relative to Vih,min and Vil,max. Those are the numbers dictated by the I2C specification itself, and that's also how they're referenced in the standard.
This is also noted in Section 8.1.1 of the data manual, i.e. we state that all rise/fall parameters are related to Vih,min and Vil,max. There are a few cases that are different such as MMC which is why for that specification we explicitly state that we're referring to the 10%-90% transition time.