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DM385 UART2 mux problem

Other Parts Discussed in Thread: DM385

Hello!

We have DM385 IPNC. We are trying to use UART2 Rx/Tx and we can't mux pins in correct way.

I want to use these pins(mux814x.c):

_TI814X_MUXENTRY(DCAN0_TX, 0,
"dcan0_tx", "uart2_txd_mux2", NULL, NULL, NULL,
"i2c3_sda_mux1", NULL, "gpio1_0", NULL, NULL, NULL,
NULL),
_TI814X_MUXENTRY(DCAN0_RX, 0,
"dcan0_rx", "uart2_rxd_mux2", NULL, NULL, NULL,
"i2c3_scl_mux1", NULL, "gpio1_1", NULL, NULL, NULL,
NULL),

In board init file board-dm385ipnc.c file I tried to setup pinmux in a different ways

static void dm38x_uart2_pin_mux(void)
{

  sprintf(mux_name, "uart2_rxd_mux2");
  omap_mux_init_signal(mux_name, TI814X_PULL_DIS | TI814X_INPUT_EN);
  sprintf(mux_name, "uart2_txd_mux2");
  omap_mux_init_signal(mux_name, TI814X_PULL_UP );

}

or like this

static void dm38x_uart2_pin_mux(void)
{

  sprintf(mux_name, "dacn0_rx.uart2_rxd_mux2");
  omap_mux_init_signal(mux_name, TI814X_PULL_DIS | TI814X_INPUT_EN);
  sprintf(mux_name, "dcan0_tx.uart2_txd_mux2");
  omap_mux_init_signal(mux_name, TI814X_PULL_UP );

}

I even tryied to enable gpio function on one of these pins.

 

But when I am checking result after linux booted in debugfs I always see

dcan0_rx.dcan0_rx OMAP_MUX_MODE0

dcan0_tx.dcan0_tx OMAP_MUX_MODE0

As I know CAN doesn't exist on DM385. May it somehow could be a reason?

 

I found a place in u-boot where these pins setup is done. Acording to padconf map these pins are configured for UART2! Somehow these settings are overrided(?) during linux boot, or this setup just doesn't work..

 

And also I tried to do all this with UART1. Pinmux is ok and ttyO1 is working. But I need to use ttyO2(UART2).

  • Dmitry,

    DM385 device is also know as DM813x/TI813x device. Refer to the below wiki page for how to configure the pinmux in the linux kernel:

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_User_Guide#TI814X.2FTI813X

    Regards,
    Pavel

  • Hi Pavel.

    I saw this manual. It didn't help me. I know that DM385 is ex-TI813X. There is some information about particular pins In this manual. But it's not about dcan0/uart2 pins. 

    Only pins defined with 813x in mux814x.c are:

    uart0_rtsn_ti813x

    xref_clk2_ti813x

    In DM385 pin M21 doesn't have mode0. But there is no definition dcan0_rx_ti813x or uart2_rxd_mux2_ti813x in mux814x.c. Could it be defined somether else?

  • Dmitry,

    Do you have any firmware loaded after the linux kernel? If yes, try to disable this firmware auto-loading, as it might override your pin mux settings from the linux kernel.

    I am now aware of the IPNC RDK, I am working with the EZSDK. In EZSDK we have some older versions of the VPSS-M3 firmware, where this VPSS-M3 firmware override the UART mux settings. See the below e2e thread:

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/191218/715341.aspx#715341

    Regards,
    Pavel

  • Pavel,

    Now I am working with disabled firmware loading. Init script is commented and only kernel booted.

    I will try to printout PINCTL register value during boot to see if it changes.

  • Pavel,

    if I run in U-boot

    #md.l 0x4814090C 2
    4814090c: 000e0002 000e0002

    So here registers are set to UART2

    But when linux is booted:

    # mount -t debugfs none /sys/kernel/debug/
    # cd /sys/kernel/debug/omap_mux/
    :/sys/kernel/debug/omap_mux# cat dcan*
    name: dcan0_rx.dcan0_rx (0x48140910/0x910 = 0x60001), b NA, t NA
    mode: TI814X_PIN_INPUT_PULL_UP | TI81XX_MUX_MODE0
    signals: dcan0_rx | uart2_rxd_mux2 | NA | NA | NA | i2c3_scl_mux1 | NA | gpio1_1
    name: dcan0_tx.dcan0_tx (0x4814090c/0x90c = 0x0001), b NA, t NA
    mode: TI81XX_MUX_MODE0
    signals: dcan0_tx | uart2_txd_mux2 | NA | NA | NA | i2c3_sda_mux1 | NA | gpio1_0

    Somewhere settings are changed..

  • Dmitry,

    Can you try print the UART2 pinmux registers right after setting them into the board-dm385ipnc.c file? Thus you will be sure you are setting UART2 pinmux fine and after that something is overwriting these values.

    Regards,
    Pavel

  • Pavel,

    Is there any special API to access registers? I tried to do it in a direct way but it raises paging fault and crashes booting process.

    Can you, please suggest me, how to do it better?

    Thanks, 

    Dmitry.

  • Ok, Pavel,

    I think I found it.

    In file arch/arm/mach-omap2/devices.c CAN settings are applied in ti814x_d_can_init() function.

    Now it's commented. And after kernel build I see:

    name: dcan0_rx.uart2_rxd_mux2 (0x48140910/0x910 = 0x50002), b NA, t NA
    mode: TI814X_PIN_INPUT_PULL_DIS | TI81XX_MUX_MODE1
    signals: dcan0_rx | uart2_rxd_mux2 | NA | NA | NA | i2c3_scl_mux1 | NA | gpio1_1
    name: dcan0_tx.uart2_txd_mux2 (0x4814090c/0x90c = 0x20002), b NA, t NA
    mode: TI81XX_MUX_MODE1
    signals: dcan0_tx | uart2_txd_mux2 | NA | NA | NA | i2c3_sda_mux1 | NA | gpio1_0

    So, setting were overriden by another function.

    Thanks for your help.

    Dmitry

  • Dmitry,

    I am glad to know you found the root cause and solve the issue.

    Just for your information, you can not directly access the memory mapped register in the linux kernel. You should first translate the physical address to logical/virtual address, and then access this virtual address.

    You’ll need to map the physically memory to virtual memory using linux kernal ioremap system call. See usb-musb.c for how the usb physical registers are map using ioremap.

    Basic example below:

    static void __iomem *base;

    base = ioremap(0x48180800, SZ_4K);

    __raw_readl(base);

    __raw_writel(0x1,base);
       
    __raw_writel(0x0,base + 0x20);

    Regards,
    Pavel