Hi All,
"The RBL does not do any form of bad block checking/management. It will simply rely on using the HW ECCs generated during the page reads to verify that a page read was correct. This means that the HW ECC values generated during the reads of each 512 bytes of data will be compared against the ECC values that are stored in the spare bytes of the NAND page. If the RBL sees an ECC mismatch occur during a page read, it will abort the operation from that block and try the next block. It will do this up to block 5 of the NAND device, strting from block 1 (skipping over block 0). If there is an ECC mismatch, the RBL will NOT use the ECC values to do bit error correction, even though the mismatched values could be used to find and correct a single-bit error." source: processors.wiki.ti.com/.../RBL_UBL_and_host_program
The above desc. stats that I can write upto 5 u-boot.min to 5 different blocks of NAND and if any of the blocks is having ECC issue, RBL will jump to next block for valid u-boot.min.
I got this point and I understand it, now how can I write 5 uboot.min to 5 different block of NAND using bootscript? because in boot script I can write the complete partition.
Another question is how RBL counts the block size? for ex Samsung K9K1208Q0C at 0x2000000 (64 MB, 16 kB sector) NAND has 16 kB block size and I have build uboot on DM8127 platform, my u-boot.min is of 91K. So I am not able to relate the above description in terms of NAND block size and actual u-boot.min size.
It will be great if somebody please help me to understand this.
Thanks & Regards,
Suresh