Boot time optimization: UBIFS, ubiattach takes 8-9 seconds

Hitesh Viradiya89

Other Parts Discussed in Thread: AM3505

Hello TI,

We have a custom product based on TI DM8148 & TI AM3505. We are using same kernel version (2.6.37) in both the SoCs. We have almost same size of FS in both the case. Still we see that ubiattach takes ~8-9 seconds time in case of DM8148 kernel while it takes ~1 second with AM3505 kernel.

Notable change in NAND part in both boards (having DM8148 & AM3505) is data bus width. We have 16-bit data bus in case of Sitara (AM3505) while we have 8-bit data bus in case of Davinci Centauras (DM8148).

nboot is also shows huge difference while reading from NAND at u-boot level. In case of Davinci Centauras (DM8148) we have ~7 seconds to load ~4.5MB size uImage while in case of Sitara (AM3505) it takes ~1-2 seconds with ~2.7MB size uImage. Original uImage load time was ~9 seconds which we optimize by 2 seconds by changing GPMC CONFIG1-7 registers but still ~7 second is huge time for us.

Please advise.

Thanks,

Hitesh

over 8 years ago

0 Pavel Botev over 8 years ago

TI__Guru**** 170625 points

Hi Hitesh,

Can you try with the latest version of the TI814x linux kernel, available at the below location. Do you have any improvement?

arago-project.org/.../

See also if the below wiki pages will be in help:

processors.wiki.ti.com/.../Linux_Core_NAND_User's_Guide
processors.wiki.ti.com/.../EZSDK_Using_data_on_SD_and_filesystem_on_NAND
processors.wiki.ti.com/.../EZSDK_Fast_Boot_Streaming_Video
processors.wiki.ti.com/.../Sitara_Linux_Training:_Boot_Time_Reduction_Update
processors.wiki.ti.com/.../TI81XX_PSP_04.04.00.02_Feature_Performance_Guide

Regarding u-boot NAND speed, see the below e2e thread:
e2e.ti.com/.../191923

Regards,
Pavel

0 Pavel Botev over 8 years ago in reply to Pavel Botev

TI__Guru**** 170625 points

Check also the below e2e thread:
e2e.ti.com/.../377262

0 Hitesh Viradiya89 over 8 years ago in reply to Pavel Botev

Intellectual 320 points

Hi Pavel,

Thanks for the prompt response. I am following e2e.ti.com/.../191923 first to speed up NAND read at U-Boot.

I am using same U-Boot (u-boot-2010.06-psp04.04.00.01) which you used, In addition to that I have already applied GPMC_CONFIGx_1-7 registers as that of Linux at U-Boot. But still it is not that fast as yours case.

My uImage is 4.5 MB size and still it takes 7+ Seconds to load. Please advise further what I am missing. I have below settings as of now:
ARM running @ 1000 MHz
I hope GPMC running @ 100 MHz because I have "#define L3_M (pg_val_ti814x(880, 800))" in clocks_ti814x.h file. I tried below:
#define L3_M (pg_val_ti814x(880, 1040)) but mini u-boot stuck somewhere !!!

Please advise direction to start R&D. ~2 MB/sec is far good for us but Currently it is ~500-600 KB/Sec.

--
Thanks,
Hitesh

0 Pavel Botev over 8 years ago in reply to Hitesh Viradiya89

TI__Guru**** 170625 points

Hitesh,

Please use the latest TI81xx u-boot, available at the below location:
arago-project.org/.../

You should also try this test on the DM814x TI EVM.

Regards,
Pavel

0 Hitesh Viradiya89 over 8 years ago in reply to Pavel Botev

Intellectual 320 points

Pavel,

It's a huge patch set. It's hard to find out the correct patch (if any).

Let me know if you have something direct in your mind. BTW, kernel level I achieved ~2 MB/s. Though applied all the timings of GPMC, at u-boot it is still low ~600 KB/s. So I think Renjith (from PathPartner) has modified MTD driver in U-Boot and that is the only missing change.

But still I wonder, why you are achieving 3 seconds while I am achieving it 7 seconds!!!!

Please advise,
Hitesh

0 Pavel Botev over 8 years ago in reply to Hitesh Viradiya89

TI__Guru**** 170625 points

Hitesh,

I am using DM814x TI EVM, may be that is the reason.

Also you can apply u-boot patches related to GPMC/NAND and cache. Also you can explore latest TI u-boot-2016.05 GPMC/NAND settings, DMA, cache, MMU and apply these in your u-boot

Other things you can check are:

- At the moment U-Boot isn’t reading the NAND busy/ready line. So, implementing this can improve the read speed
- Also, the error-locater module takes real time to operate. There’ an optimization in the kernel that only uses the ELM when necessary. You can leverage this to further improve the read speed.
- currently, ti81xx-uboot uses the same, NAND IO signal-timings as those set by ROM. These IO signal-timings are pessimistic, in order to be compatible to range of devices (slow/fast). To optimize further you need to add the code, where IO signal-timings are re-configured in U-Boot as per your NAND device datasheet.

See also the below e2e threads:
e2e.ti.com/.../161119
e2e.ti.com/.../169220
e2e.ti.com/.../128433
e2e.ti.com/.../122173

Regards,
Pavel

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Boot time optimization: UBIFS, ubiattach takes 8-9 seconds