Connecting a 24-bit RGB TFT LCD to the TMS320C6A8168

Hi Steve

Thanks for taking the time to answer my question. The LCD connection seems to be as simple as I had hoped it to be :)  I'd still appreciate it if you could help verify this part of our schematic, once it has been drawn up?

We are working towards our own Integra based board, but as an intermediate step we are now designing an "integration board" which will plug into the expansion connectors on our C6A8168 DDR3 EVM and which will bring out the LCD interface (among other things), in order for us to test it with our chosen LCD panel.

A further major system block which we are testing with the above integration board is the connection between the Integra (DSP sub-system) and a separate DSP pre-processor (TMS320C6746). This pre-processor is connected to the Integra's GPMC EMIF interface via the C6746's Host Port Interface. Do you have any experience implementing such an inter-connection? Any help / tips / caveats would be appreciated!

Kind regards

Ockie

OK, thanks Steve, much appreciated!!

Regards

Ockie

Hi Steve

I'd appreciate it if you could take a look at my LCD connection? I've uploaded two schematic snippets, one showing my connection to the C6A8168 DDR3 (Rev. E) EVM and the other showing my connection to the LCD's ZIF connector. For clarity, the LCD's datasheet is also included.

1. 4885.EVM_Interface_2011-08-26.pdf

2. 4666.LCD_Interface_2011-08-26.pdf

3. 4401.DLC0700BIG-1 spec.pdf

Thank you and regards

Ockie

Ockie,

This looks fine for sync mode. I recommend adding resistor population options to allow you to use DE mode too though.

DE mode usually gives you more flexibility in the timing sent from the processor.

I assume all your other control signals for rotation etc... are correctly connected?

BR,

Steve

Hi Steve

Thanks for taking the time to have a look. Making provision for the DE mode sounds like a good idea, I'll do that. Am I correct in saying the DE signal should be driven by the VOUT[0]_AVID output from the Integra? Also, in general, what would the "Field ID" output (VOUT[0]_FLD) from the Integra typically be used for?

Regards

Ockie

Ockie,

You are more than welcome :)

Yes, DE should go to AVID.

FID is used when the DSP is outputting interlaced video. In your case you are connecting directly to an LCD panel and all LCD panels are inherently progressive, so it is not used.

If you were connecting to a DAC and generating, for example, 1080i HD video then you could use the FID signal.

BR,

Steve

Hi guys,

where can I find output video port pin mapping for 24bit RGB format on C6A8168?

For example, where did you get following information:

VOUT[0]_B-CB-C[2] -> B0[LSB]
VOUT[0]_B-CB-C[3] -> B1
...
VOUT[0]_B-CB-C[9] -> B7[MSB]

I would like to connect LVDS transmitter as described here:

http://processors.wiki.ti.com/index.php/File:LVDS24-1.JPG

Thank you,

- Robert

Robert,

The 8168 outputs 10 significant bits per color channel but the LVDS LCD you are connecting to only has 8 significant bits per color channel so you need to connect the most significant bits of the LCD to the most significant bits of the DSP output, hence DSP9->LCD7, DSP8->LCD6 etc...

You can discard the 2 least significant bits from the DSP output.

BR,

Steve

Hi Steve,

thank you very much.

What I am asking is, where I can find information how C6A8168 maps 24 bit RGB output on its video output pins.

It's clear from your description how to connect it, I just would like to know were did you find following information: When DSP runs in RGB mode then VOUT[0]_B-CB-C[2] = RGB B0 [LSB].

Thank you,

- Robert

Robert,

There is no mapping as such. It is simply that the DSP outputs 10 bits per channel. It is up to your system to take as many significant bits as you require, in this case 8.

BR,

Steve

Hi Steve,

I found this in datasheet:

VOUT[0]_B_CB_C[9], VOUT[0]_B_CB_C[8], ... VOUT[0]_B_CB_C[2]

Video Output 0 Data. These signals represent the
8 MSBs of B/CB/C video data. For RGB mode
they are blue data bits, for YUV444 mode they are
Cb (Chroma) data bits, for Y/C mode they are
multiplexed Cb/Cr (Chroma) data bits and for
BT.656 mode they are unused

I am looking for some kind of table with pin mapping for each of the output modes - from this description I can only assume that for RGB mode the bit VOUT[0]_B_CB_C[9] is MSB and VOUT[0]_B_CB_C[2] is LSB.

- Robert

Robert,

The bit position is in the signal name.It is not really an assumption. Bit 2 is not the least significant bit in a 10 bit output, bit 0 is, but in your specific use case where you are only using 8 bits then you need to use the upper 8 most significant bits.

The DSP outputs 10 bits per color channel, numbered [9] down to [0]. You must pick the appropriate number of significant bits.

For example, if you were connecting to a low dynamic range LCD with 6 bits per color then you would connect the 6 LCD color bits to the upper 6 bits of each DSP color channel output, i.e. DSP[9] -> LCD[5], DSP[8] -> LCD[4],... DSP[4] -> LCD[0] In this case the LSB would be bit 4.

The point I am trying to stress is that the lowest used significant bit is entirely dependent on your system and is not really anything to do with the DSP outputs, only the number of bits you need.

The name of the signal contains the bit position for the specific output mode being used. VOut[0]_B_CB_C[9] for example means bit [9] of blue, CB or C, i.e.

B[9] (blue) when using RGB mode
Cb[9] (chroma blue difference) when using YUV 4444 mode
C[9] (chroma) when using 20 bit YUV 422 YC mode

BR,

Steve

:)

"The bit position is in the signal name."

That is how it should be, but couple of times I have seen ordering were 0 was actually used for MSB bit and bit X = LSB . I just wanted to be sure this is not the case :)

Thank you Steve for all your answers. I am now sure the bit 9 is MSB and 0 LSB.

- Robert

Yeah, there are always "gotchas" !!!

Glad you are comfortable now.

BR,

Steve