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DM8168 held in constant Reset State!

Bruce Kennedy
Prodigy 190 points


Can anyone answer this?  Our board is up and running, power supplies are up and sequenced properly.  Other reset functions appear to be fine.  The DM8168 chip is being held in reset (Viewed from RSTOUTn) and we have one area of suspicion.  JTAG communication with target fails.  We were told in schematic reviews and in the forum here these connection DO NOT need to be made if we are NOT using the analog OUTPUT video functions.

The following 8 Video DAC power inputs are unconnected, as the analog video is not used.

VDDAHD1P0       AG21

VDDAHD1P8       AH22

VDDAHD1P8       AJ22

VDDASD1P0       AG20

VDDASD1P8       AH20

VDDASD1P8       AH21

VDDASD1P8       AJ21

VDDAREF1P8     AT22

Can the absence of these power inputs cause the DaVinci to remain in a reset state (RSTOUTn always low)?

Additionally, on the EVM reference board, a number of reserved pins are connected to the power rails.

RSV52                   AE21

RSV53                   AG22

RSV54                   AG23

RSV55                   AH23

RSV56                   AJ23

Can the absence of these power inputs cause the DaVinci to remain in a reset state (RSTOUTn always low)?

  • 0
    Prodigy 190 points

    Marc:

     

    Said another way.

     

    What are considered (CVDD, CVDD_ARM, CVDD_DSP, CVDD_HDVICP for example)  the "core rails" in the DM8168 that the system tests for in the power up sequence and reset logic?  We are trying to determine issue in the reset logic per my other post.  Are other supplies considered for the DM8168 device to come out of a reset?

     

    We really need to understand if this an issue with our board bring-up

     

    Thanks Bruce

  • 0
    TI__Mastermind 25055 points

    Bruce,

    I'm not sure if this is the primary cause of the reset issue, but the DAC power inputs should be connected to 1.0V or 1.8V supplies, and the RSV52-56 pins should be connected to a 1.8V supply.  Please refer to the Terminal Functions tables in the datasheet for more details.

    CVDD and CVDDC are the "core rails" in the DM8168.

    Regards,
    Marc

  • 0 in reply to MarcPyne
    Prodigy 190 points

    Thanks Marc

    Is there any way to force a hardware reset and get the chip happy so we can boot?  I suspect the answer is no but thought we'd ask

     

    Appreciate the prompt response---Bruce

  • 0 in reply to Bruce Kennedy
    Prodigy 190 points

    Resolved--found a problem with a clock.  It appears (Crossed fingers) that we are now out of reset.  I will update next week and indicate this post is resolved.

     

    Appreciate the help here Marc

     

    Bruce

  • 0 in reply to Bruce Kennedy
    TI__Mastermind 25055 points

    Hi Bruce,

    I'm glad that you have found what appears to be a solution to the problem.  I look forward to seeing your update/confirmation.

    Regards,
    Marc