How to connect DM8168 with fpga by emif？

da li1

Other Parts Discussed in Thread: OMAP-L138

I want to connect DM8168 with fpga, for dsp process video and trans data to fpga internal bram（fpga is the main control processor ）.

but the datasheet just shows emif as ddr2/ddr3 port signals， not as follow in example xlx_s6_omap， OMAP-L138 SOM-M1 WITH POWER MEASUREMENT ：

   emifa_clk                : in std_logic;
    emifa_rnw                : in std_logic;
    emifa_cs2                : in std_logic;
    emifa_oe_n               : in std_logic;
    emifa_we_n               : in std_logic;
    emifa_wait0              : in std_logic;
    emifa_wait1              : in std_logic;

    emifa_ba1                : in std_logic;
    emifa_addr               : in std_logic_vector(13 downto 0);
    emifa_data               : in std_logic_vector(15 downto 0);

and how to define connections for dsp dm8168？

over 12 years ago

0 Pavel Botev over 12 years ago

TI__Guru**** 170625 points

Hello,

This looks like VHDL code and we do not provide such in the DM816x datasheet and TRM.

For the EMIF/DDR in/out signals description, see DM816x TRM, chapter 7 DDR2/DDR3 Memory Controller

7.2.1 Signal Descriptions

Figure 7-1. DDR2/3 Memory Controller Signals

Table 7-1. DDR2/3 Memory Controller Signal Descriptions

Regards,

Pavel

0 da li1 over 12 years ago in reply to Pavel Botev

Prodigy 60 points

I check the doc, and find ddr2/ddr3 only support ddr2/ddr3 ， and our fpga internal ram is simple ram block （BRAM）， which just has we，addr[...]，din[...]，dout[...],clk signals;

the above is the example of avnet board connecting fpga and dsp, emifa of fpga are composed by 2 dual port ram.

so what should I select and how to connect? GPMC?

0 Pavel Botev over 12 years ago in reply to da li1

TI__Guru**** 170625 points

Hello,

FPGA can be connected to GPMC. This is an extract from the DM816x datasheet:

General Purpose Memory Controller (GPMC) - Flexible Asynchronous Protocol Control for Interface to FPGA, CPLD, ASICs

8.8 General-Purpose Memory Controller (GPMC) and Error Locator Module (ELM)

The GPMC is a device memory controller used to provide a glueless interface to external memory devices such as NOR Flash, NAND Flash (with BCH and Hamming Error Code Detection for 8-bit or 16-bit NAND Flash), SRAM, and Pseudo-SRAM. It includes flexible asynchronous protocol control for interface to SRAM-like memories and custom logic (FPGA, CPLD, ASICs, and others).

The GPMC i/o signals are described in the DM816x TRM:

9.2.1 GPMC Signals

Table 9-1. GPMC I/O Description

We have some info here also: http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/235797.aspx

Regards,

Pavel

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How to connect DM8168 with fpga by emif？