the mailbox interrupt of DM8168 on the dsp side

I have modified and rebuild the ipc, however I found it has no effect. I modified the code as follow:

1. I defined  mailbox 10 for the communication between A8 and DSP

        #define ITG_HOST_TO_DSP  10

2. I enable the new message interrupt of mailbox 10

    REG32(MAILBOX_IRQENABLE_SET_DSP) = ((MAILBOX_REG_VAL(HOST_TO_DSP) | MAILBOX_REG_VAL(ITG_HOST_TO_DSP)));

3. I receive the message from A8 and clear the status of interrupt on the ISR InterruptDsp_intShmStub()

if(REG32(MAILBOX_IRQENABLE_SET_DSP) & MAILBOX_REG_VAL(ITG_HOST_TO_DSP)
     & REG32(MAILBOX_IRQSTATUS_CLR_DSP) != 0)
{
        //get the count of message in the mailbox FIFO
        msg_cnt = REG32(MAILBOX_STATUS(ITG_HOST_TO_DSP));
        //receive and store the message
        for(i = 0; i < msg_cnt; i++)
        {
                 recv_msg[mbox_recv_cnt] = REG32(MAILBOX_MESSAGE(ITG_HOST_TO_DSP));
                 mbox_recv_cnt++;
                 if(mbox_recv_cnt >= RECV_ARRAY_CNT_MAX)
                {
                        mbox_recv_cnt = 0;
                }
        }
       //clear the interrupt status
      REG32(MAILBOX_IRQSTATUS_CLR_DSP) = MAILBOX_REG_VAL(ITG_HOST_TO_DSP);
}

Are there any errors?

Regards,

Tianxing

Yogesh,

Thanks for your help.

I will consure our requirement about the  consume time with my colleague.

Regards,

Tianxing

Yogesh,

I need use the mailbox interrupt.

Now, I am sure that the new message interrupt of mailbox10 is enabled on the DSP side. However, when I write the mailbox10 on the A8 side, it can't generage the interrupt. I used the "mmap" to remap the PA to the user space.

Could you give me some advices?

Thanks,

Tianxing 

Tianxing,

Have you enabled mailbox clk? without that writing in to mailbox will not gernerate interrupt. Look at DM8168DSPPWR_on() function in SysLink ti_tools\syslink\syslink_x_xx_xx_xx\packages\ti\syslink\family\common\ti81xx\ti81xxdsp\Dm8168DspPwr.c, you need to enable mailbox_ick clk to get mailbox functional

Yogesh,

I have resolved the bug as I mentioned before.

Now, I have another question about the using of mailbox. I defined two mailbox for the communication from A8 to DSP, one is the mailbox 3(it is used by syslink/ipc), another is the mailbox 10(used by ourself), when I write the mailbox10 and mailbox3 on the A8 side at the same time as the follow:

    *mbox_message_03 = 0x5A5A;

    *mbox_message_10 = 0x5B5B;

It would generate a interrupt to DSP, however I can't get the message from mailbox3 and mailbox10, the value of  MAILBOX_IRQSTATUS_CLR_u register is 0 before I write the register.  

I want to use the mailbox interrupt directy in ourself way, however, I hope it will not obstruct the using of notify in syslink/ipc.

Could you give me some advices about that?

Thanks,

Tianxing

Yogesh,

I want to know the mutex about the mailbox if I write message to different mailbox simultaneously on the A8 or DSP side..

For example, I write a message to mailbox10 on the A8 side, simulaneously, I write a message to mailbox3 on the A8 side. 

Regards.

Tianxing

I dont think you need to worry about that. The interrupt service routine on the remote core should enusre that  all mailboxes those are enabled to receive interrupts are checked for value and service those interrupts e.g. if DSP has enabled interrupts from A8 and M3 on different mailboxes, in its ISR it will ensure both interrupts are serviced irrespective of when mailboxes were written the values.

Tianxing,

As far as mailbox10 is not used by syslink/ipc for any other instance of notify it should be ok and it should not obstruct notify functionality. For the other part, are you able to get interrupt on dsp by writing only mailbox3 or only mailbox10?  When you are writing from A8 have you ensured mapping of mailbox register space in to respective Os's virtual space(user or kernel)? also when you write to mailbox just ensure the value is being written to right address by watching memory window in CCS with A8 MMU disabled.

Yogesh,

I have get the interrupt on dsp by writing only mailbox3 or only mailbox10, and I can receive the message successful. However, when I writing mailbox3 and mailbox10 simultaneously, it will get the intterrupt on dsp but the message is not recevied.

The Os's virtual space is correctly.

Regards,

Tianxing