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about EDMA3_DRV_requestChannel in dm6446



when I use EDMA3_DRV_requestChannel to alloc a dma channel, but I only get 9 channels to use,why? I am working in DM6446, it has 64 DMA channels.

edma_tcc1 = EDMA3_DRV_TCC_ANY;

edma_ch1Id = EDMA3_DRV_DMA_CHANNEL_ANY;

while(1)

 {

         if (result == EDMA3_DRV_SOK)

         {

                  result = EDMA3_DRV_requestChannel (hEdma, &edma_ch1Id, &edma_tcc1, (EDMA3_RM_EventQueue)0,

                                 NULL, NULL);

         }

}

  • The EDMA3 driver will take the configuration information to know the number of available channels for it to allocate when requested. By default the structure is present in platform specific configuration file (In your case it will be bios_edma3_drv_sample_dm644x_cfg.c) and the structure is sampleInstInitConfig. Please look into this structure and enable all the channels, params required for your application.  

     

  • I want to enable all 64 dma channels, can you give me a example to change the bios_edma3_drv_sample_dm644x_cfg.c? Thanks very much

  • File: bios_edma3_drv_sample_dm644x_cfg.c

    Step 1)

    Change the following code:

    #define EDMA3_DMA_CHANNEL_TO_EVENT_MAPPING_0          0x3DFF0FFCu

    #define EDMA3_DMA_CHANNEL_TO_EVENT_MAPPING_1          0x007F1FFF

    to:

    #define EDMA3_DMA_CHANNEL_TO_EVENT_MAPPING_0          0x0u

    #define EDMA3_DMA_CHANNEL_TO_EVENT_MAPPING_1          0x0u

    Step 2) 

    In structure: EDMA3_DRV_InstanceInitConfig sampleInst {}

    Change the following code :

                /* ownDmaChannels */
                {0xFFFFFFFFu, 0x0u},

                /* ownTccs */
                {0xFFFFFFFFu, 0x0u}

    to

                /* ownDmaChannels */
                {0xFFFFFFFFu, 0xFFFFFFFFu},

                /* ownTccs */
                {0xFFFFFFFFu, 0xFFFFFFFFu}

     

    - Please let me know whether it works

     

  • Missed to mention abou the param allocation:

    - In structure: EDMA3_DRV_InstanceInitConfig sampleInst {}, change the following values

    /* ownPaRAMSets */
                {0xFFFFFFFFu, 0xFFFFFF00u, 0xFF000000u, 0x0u, 0x0u, 0x0u, 0x0u, 0x0u,
                0x0u, 0x0u, 0x0u, 0x0u, 0x0u, 0x0u, 0x0u, 0x0u},

    to:

    /* ownPaRAMSets */
                {0xFFFFFFFFu, 0xFFFFFFFFu, 0xFF000000u, 0x0u, 0x0u, 0x0u, 0x0u, 0x0u,
                0x0u, 0x0u, 0x0u, 0x0u, 0x0u, 0x0u, 0x0u, 0x0u},

    - This will make sure all the 64 dma channels will have required number of PaRAM sets.

     

     

     

     

  • It works well, Thanks

  • Where is this structure for C6747 platform? I have the same problem

  • Hi Nagabhushan,

    I need help on EDMA3 working with McBSP.

    =================================

    tcc = EDMA3_DRV_TCC_ANY;

    chId = EDMA3_DRV_DMA_CHANNEL_ANY;

    result = EDMA3_DRV_requestChannel (hEdma, &chId, &tcc, (EDMA3_RM_EventQueue)1, &tx_dma_isr, NULL);

    result is EDMA3_DRV_SOK.

    But =================================

    tcc = EDMA3_DRV_TCC_ANY;

    chId = EDMA3_DRV_HW_CHANNEL_EVENT_14;

    result = EDMA3_DRV_requestChannel (hEdma, &chId, &tcc, (EDMA3_RM_EventQueue)1, &tx_dma_isr, NULL);

    result is -132.

    ====================================

    What might be the problem?

    Thank you.

    Regards,

    Steve

  • Oh, I am using TMDXEVMC6657L.