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EDMA on OMAP-L138

Other Parts Discussed in Thread: OMAP-L138

Hi,

Processor: OMAP-L138

I am using the above mentioned processor. Now, my requirement is that I want to use a GPIO as external event trigger to EDMA3. But I don't want to interrupt ARM.

Some how is this possible on OMAP-L138?

Thank You & Regards,

GSR

  • This is a pretty typical use case.

    The EDMA3 events are available in the OMAP-L138 Datasheet. Additional details about Event Triggered Transfers can be found in the OMAP-L138 EDMA3 User's Guide.

    There are also some starter examples in the quickStartOMAP-L1x-rCSL package

  • Hi Drew Abuan,

    Thank You for replying.

    I have programmed my Software to initiate a EDMA transfer for GPIO Bank Interrupt.

    My observation is that ARM Processor is also interrupted for GPIO Bank Interrupt.

    But, I don't want to interrupt the ARM on a GPIO Interrupt.

    I am searching documents if this is possible or not with OMAP-L138.

    Regards,

    GSR

  • Do you also have the GPIO bank event rounted to the ARM interrupt controller (AINTC?)

    In this case, I would expect the ARM to also be interrupted since it's the same event. You should be able to mask off the GPIO Bank event from being propagated to the ARM via the AINTC registers.

  • Hi Drew Abuan,

    Thanks for the reply.

    My understanding from your reply is that if EDMA uses GPIO Bank Interrupt then its not possible to trigger EDMA transfer only with out triggering ARM.

    Correct me if my understanding is wrong.

    Regards,

    GSR

  • The Event will be generated on the Input of the ARM Interrupt Controller (AINTC), however you should be able to mask it off from the ARM core itself - therefore the GPIO Event can occur, but it will never interrupt the ARM core. Please refer to the OMAP-L138 System Reference Guide for details in regards to the AINTC

  • Hi Drew Abuan,

    When I disable ARM (GPIO Bank Interrupt), I see that EDMA transfer is not triggered.

    Is it expected behaviour.

    We have interfaced a CPLD over EMIFA. Inside CPLD we have implemented a single 16-bit register.

    The data that CPLD collects in 1Second is 125KB. Inorder to trigger EDMA transfer we are setting GPIO as external trigger event for the EDMA.

    But, what we are thinking is since ARM and EDMA uses the same GPIO Bank Interrupt the CPU will also interrupted (128000 / 2) times. Which we don't want.

    So, I am looking for a register where in we can disable ARM Interrupt, But at the same time GPIO Signal shall able to trigger a EDMA transfer.

    Thank You & Regards,

    GSR

  • 1258021 said:

    When I disable ARM (GPIO Bank Interrupt), I see that EDMA transfer is not triggered.

    Is it expected behaviour.

    No. Which register did you you write to and what value?

     

  • Hi Drew Abuan,

    Thank You for the reply.

    I overlooked in the existing software and thought that there is no separate Bank Interrupt in the GPIO Registers.

    In our OS we use an API instead of directly writing to registers which enables Individual GPIO Interrupts.

    So, I thought it's not possible to disable ARM interrupt and use GPIO event as External Trigger for initiating EDMA transfer.

    Regards,

    GSR

  • GSR,

       Does it work now?

      Each of the events can be individually masked off in the interrupt controllers, as well as in the EDMA3. If you are using an API which does not allow this, you might have to look into the source code to determine how to properly implement this at the register level.

  • Hi Drew Abuan,

    Yes, it is working now.

    Thank You & Regards,

    GSR