OMAP-L138 uPP Receive Problem

Does the A/D supply a clock to the uPP receiver?  Please post a register dump of your configuration.

Yes I think so the A/D supply a clock to the uPP receiver. I used the example of the configuration  in the Kit's CD.

Here is my uPP register's configuration :

//Setup ADC Clock

CDCE913_setOutput(cdce913_output_2, 6); //set to 4.5Mhz

//UPCTL

config.UPCTL.value=0;

config.UPCTL.bits.DPFB = 2;

config.UPCTL.bits.IWB = 1; //16 bit interface

config.UPCTL.bits.DPWB = 4; //10 bit data

config.UPCTL.bits.DPFA = 0;

config.UPCTL.bits.DPWA = 0;

config.UPCTL.bits.IWA = 1;

config.UPCTL.bits.CHN = 1; //dual channel mode

config.UPCTL.bits.MODE = 2; //0 all recv, 1 all xmit, 2 a recv b xmit, 3 a xmit b recv

//Channel A ADC, Channel B DAC

//UPICR

config.UPICR.value=0;

config.UPICR.bits.CLKDIVB =9; //0 to 15 --> Set DAC sampling freqency at 75/16 Mhz(4.6875MHz) to 75/1 (75Mhz)

//UPIVR

config.UPIVR.value=0;

config.UPIVR.bits.VALB =0x1000; //0x0BBB;

    config.UPIVR.bits.VALA = 0x0000;

//UPTCR

config.UPTCR.value=0; //all values 0 for 64byte DMA bursts read / write

//UPDLB

config.UPDLB.value=0; //with loopback

config.UPDLB.bits.BA=1;

//UPIES

config.UPIES.value=0; //dont enable any interrupts

config.UPIES.bits.EOLQ=1;

config.UPIES.bits.EOWQ=1;

config.UPIES.bits.EOLI=1;

config.UPIES.bits.EOWI=1;

//UPPCR

config.UPPCR.value = 0;

config.UPPCR.bits.EN = 1; //enable uPP

config.UPPCR.bits.RTEMU = 1; //allow emulator use

config.UPPCR.bits.SOFT = 1; //allow emulation

    UPP_init(&config); 

Thanks Brad for your reply .

Said.

Is this problem solve?

I have a similar problem in receive mode interrupt.

Our customer wants to use only a receive mode which means that data comes from their H/W outside to UPP’s DMA.

I tested with DSP/BIOS UPP example with BA or AB loop back mode. The only transmit interrupt is triggered. No receive interrupt at all even though registers(UPIS0 or UPQS0) for receive mode show that all transmitted data is received successfully.

Is this a reported chip bug for early version or something? Or some specific PIN mux to get receive interrupt?

Thank you in advance for your comments.

Hello,

Did somebody resolve this problem? It looks like I have the same situation - the receive interupt doesn't want to trigger when in B->A loopback mode. I am using OMAP-L138 experimenter it.

Does somebody know maybe is the receive interrupt triggering properly when the UPP is receiving data from external source without loopback?

Ok, problem is gone. I just cleared UPIER straight at the beginning of interrupt function. Probably the time between interupts could be too short.