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OMAP L137 ARM UBL

Hi,

I'm currently struggling with my OMAP L137 custom board.

As the winbond Flash from EVM was not available, we consider microchip flash which was not fully compliant.

First step was top update Flash and Boot Utilities (v2..40) and thanks an added dump command, I have checked that DSP UBL, ARM UBL and U-BOOT were correctly programmed in Flash and at the right offset (respectively 0x0, 0x2000 and 0x8000).

Next step consisted to adapt DSP UBL and ARM UBL to support my flash. To do so, I considered both CCS 3.3 projects provided with Linux package (in board_utilities directory of PSP package).

My only adaptation was spi configuration (phase,polarity and prescale) then I build .out files and convert both (ARM and DSP UBL)  with AISgen for D800K005 (using EVM configuration and our board pin configuration).

First part seems to be ok, I have checked thanks to User LED that DSP UBL is correctly executed and that ARM UBL binary is correctly copy at 0x80000000 (I have checked also with Code Composer 5 and XDS100V2 that Arm is OK I succeed to execute arm-ubl.out and I have checked also that DSP UBL binary was well executed and that content of memory at 0x80000000 matched with ARM UBL binary).

However, when considering SPI0 Flash Boot mode, I don't jump in ARM UBL binary... to be sure I toggle LEDs in an infinite loop at beginning of the application (in ARM UBL project there is a boot.c file which is supposed to insure that ARM is in supervisor mode....) but LEDs remains off... 

So from my point of view, SPI Flash is correctly programmed with all three binaries, DSP UBL is ok but I don't jump in the ARM UBL so maybe an issue with enableArm function or maybe our specific pin configuration may have some impact (even if I consider it when using AIDgen tool).

Any advice would be appreciable...

Thanks in advance.

  • Vincent,

    What is the version of the ROM on your device. You can determine this information using the Debug.gel file provided here:

    http://processors.wiki.ti.com/index.php/OMAP-L1x_Debug_Gel_Files

    Also, you can run all the tests in the Gel file to see if you can capture why the device didnt boot from SPI.

    When you say  "However, when considering SPI0 Flash Boot mode, I don't jump in ARM UBL binary... to be sure I toggle LEDs in an infinite loop at beginning of the application (in ARM UBL project there is a boot.c file which is supposed to insure that ARM is in supervisor mode....) but LEDs remains off..."

    Are you suggesting the the you can see the ARM UBL copied from SPI flash to 0x80000000 but the ROM boot doesn`t jump to that address and toggle the LEDs after boot?

    The ROM bootloader expects the SPI flash to be connected using Chip Select 0. Can you confirm that this is indeed the case with your custom board. Refer to to the constraints, boot restriction section of the Boot loader App note for OMAPL137 to see specifics.

    Regards,

    Rahul

  • Rahul,

    thank you for your quick answer, I will try the debug.gel file tomorrow...

    Otherwise to clarify my purpose, the ROM boot is ok, it succeeds to copy DSP UBL at 0x80010000 and execution of DSP UBL is also OK (checked with LED and JTAG), to make short I have checked that DSP UBL succeeds to copy ARM UBL binary from (SPI flash 0x2000) to shared RAM 0x80000000

    At the end of DSP UBL, ARM is supposed to be awaken and reset vector programmed to jump at 0x80000000 (where ARM UBL has just been copied) but it does not seem to jump into ARM UBL (the LED in ARM UBL are not toggling... even if ARM is supposed to be in supervisor mode which allows to modify SYSCFG registers)

    And yes we are using SPI0 for booting SPI Flash.

    Can you confirm that AISGen tool is supposed to be used for both ARM and DSP UBL? I know it works for DSP side but I've got some doubts for ARM side.

  • Vincent,

    Yes, you can pass both the DSP UBL and the ARM UBL to the AISGen tool but you need to specify the DSP UBL first, followed by the ARM UBL so that the ROM bootloader uses the start of the DSP UBL as the entry point. But you said that both the DSP UBL and the ARM UBL are loaded correctly and the DSP UBL executes correctly so I think you have specified the right order. Have you specified the right entry point in the ARM reset vector when the DSP UBL executes. Can you connect to the ARM after the DSP UBL executes? You can also check the PSC and LPSC settings to confirm that all the DSP UBL settings have taken effect.

    Regards,

    Rahul

  • Hi Rahul,

    I have tested Debug Gel Files and output is:

    C674X_0: GEL Output:
    DA830 DSP Startup Sequence

    C674X_0: GEL Output: Setup PINMUX Registers...C674X_0: GEL Output: [Done]
    C674X_0: GEL Output: PLL Setup Complete
    C674X_0: GEL Output: Setup Power Modules (All on)...C674X_0: GEL Output: [Done]
    C674X_0: GEL Output: ARM Enabled
    C674X_0: GEL Output:
    Startup Complete.

    C674X_0: GEL Output:
    ---------------------------------------------
    C674X_0: GEL Output: | Device Information |
    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output: DEV_INFO_00 = 0x9B7DF02F
    C674X_0: GEL Output: DEV_INFO_01 = 0x00000000
    C674X_0: GEL Output: DEV_INFO_02 = 0x00000000
    C674X_0: GEL Output: DEV_INFO_03 = 0x00000022
    C674X_0: GEL Output: DEV_INFO_04 = 0x00000000
    C674X_0: GEL Output: DEV_INFO_05 = 0x000003E0
    C674X_0: GEL Output: DEV_INFO_06 = 0x00000200
    C674X_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 8-0-153879-25-25-57
    C674X_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 0,0,0,6396
    C674X_0: GEL Output: -----
    C674X_0: GEL Output: DEV_INFO_17 = 0x00030003
    C674X_0: GEL Output: DEV_INFO_18 = 0x00000000
    C674X_0: GEL Output: DEV_INFO_19 =C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output:
    C674X_0: GEL Output: -----
    C674X_0: GEL Output: DEV_INFO_20 = 0x30303864
    C674X_0: GEL Output: DEV_INFO_21 = 0x3330306B
    C674X_0: GEL Output: DEV_INFO_22 = 0x00000000
    C674X_0: GEL Output: DEV_INFO_23 = 0x00000000
    C674X_0: GEL Output: -----
    C674X_0: GEL Output: DEV_INFO_24 = 0x19039019
    C674X_0: GEL Output: DEV_INFO_25 = 0x08025917
    C674X_0: GEL Output: DEV_INFO_06 = 0x00000200
    C674X_0: GEL Output: DEV_INFO_26 = 0x31F80000
    C674X_0: GEL Output:

    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output: | BOOTROM Info |
    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output: ROM ID: d800k003
    C674X_0: GEL Output: Silicon Revision 2.0
    C674X_0: GEL Output: Boot pins: 0
    C674X_0: GEL Output: Boot Mode: I2C0 Master (0x00000000)
    C674X_0: GEL Output:
    ROM Status Code: 0x00000000
    Description:C674X_0: GEL Output: No error
    C674X_0: GEL Output:
    Program Counter (PC) = 0x007F4E70
    C674X_0: GEL Output:
    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output: | Clock Information |
    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output:
    C674X_0: GEL Output: PLLs configured to utilize crystal.
    C674X_0: GEL Output: ASYNC3 = PLL0_SYSCLK2
    C674X_0: GEL Output:
    C674X_0: GEL Output: NOTE: All clock frequencies in following PLL sections are based
    C674X_0: GEL Output: off OSCIN = 24 MHz. If that value does not match your hardware
    C674X_0: GEL Output: you should change the #define in the top of the gel file, save it,
    C674X_0: GEL Output: and then reload.
    C674X_0: GEL Output:
    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output: | PLL0 Information |
    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output:
    C674X_0: GEL Output: PLL0_SYSCLK1 = 300 MHz
    C674X_0: GEL Output: PLL0_SYSCLK2 = 150 MHz
    C674X_0: GEL Output: PLL0_SYSCLK3 = 100 MHz
    C674X_0: GEL Output: PLL0_SYSCLK4 = 75 MHz
    C674X_0: GEL Output: PLL0_SYSCLK5 = 50 MHz
    C674X_0: GEL Output: PLL0_SYSCLK6 = 300 MHz
    C674X_0: GEL Output: PLL0_SYSCLK7 = 37 MHz
    C674X_0: GEL Output:
    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output: | PSC0 Information |
    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output:
    C674X_0: GEL Output: State Decoder:
    C674X_0: GEL Output: 0 = SwRstDisable (reset asserted, clock off)
    C674X_0: GEL Output: 1 = SyncReset (reset assered, clock on)
    C674X_0: GEL Output: 2 = Disable (reset de-asserted, clock off)
    C674X_0: GEL Output: 3 = Enable (reset de-asserted, clock on)
    C674X_0: GEL Output: >3 = Transition in progress
    C674X_0: GEL Output:
    C674X_0: GEL Output: Module 0: EDMA3CC (0) STATE = 3
    C674X_0: GEL Output: Module 1: EDMA3 TC0 STATE = 3
    C674X_0: GEL Output: Module 2: EDMA3 TC1 STATE = 3
    C674X_0: GEL Output: Module 3: EMIFA (BR7) STATE = 3
    C674X_0: GEL Output: Module 4: SPI 0 STATE = 3
    C674X_0: GEL Output: Module 5: MMC/SD 0 STATE = 3
    C674X_0: GEL Output: Module 6: AINTC STATE = 3
    C674X_0: GEL Output: Module 7: ARM RAM/ROM STATE = 3
    C674X_0: GEL Output: Module 9: UART 0 STATE = 3
    C674X_0: GEL Output: Module 10: SCR 0 (BR0/1/2/8) STATE = 3
    C674X_0: GEL Output: Module 11: SCR 1 (BR4) STATE = 3
    C674X_0: GEL Output: Module 12: SCR 2 (BR3/5/6) STATE = 3
    C674X_0: GEL Output: Module 13: PRUSS STATE = 3
    C674X_0: GEL Output: Module 14: ARM STATE = 3
    C674X_0: GEL Output: Module 15: DSP STATE = 3
    C674X_0: GEL Output:
    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output: | PSC1 Information |
    C674X_0: GEL Output: ---------------------------------------------
    C674X_0: GEL Output:
    C674X_0: GEL Output: State Decoder:
    C674X_0: GEL Output: 0 = SwRstDisable (reset asserted, clock off)
    C674X_0: GEL Output: 1 = SyncReset (reset assered, clock on)
    C674X_0: GEL Output: 2 = Disable (reset de-asserted, clock off)
    C674X_0: GEL Output: 3 = Enable (reset de-asserted, clock on)
    C674X_0: GEL Output: >3 = Transition in progress
    C674X_0: GEL Output:
    C674X_0: GEL Output: Module 1: USB0 (2.0) STATE = 3
    C674X_0: GEL Output: Module 2: USB1 (1.1) STATE = 3
    C674X_0: GEL Output: Module 3: GPIO STATE = 3
    C674X_0: GEL Output: Module 4: UHPI STATE = 3
    C674X_0: GEL Output: Module 5: EMAC STATE = 3
    C674X_0: GEL Output: Module 6: EMIFB (BR20) STATE = 3
    C674X_0: GEL Output: Module 7: MCASP0 + FIFO STATE = 3
    C674X_0: GEL Output: Module 8: MCASP1 + FIFO STATE = 3
    C674X_0: GEL Output: Module 9: MCASP2 + FIFO STATE = 3
    C674X_0: GEL Output: Module 10: SPI 1 STATE = 3
    C674X_0: GEL Output: Module 11: I2C 1 STATE = 3
    C674X_0: GEL Output: Module 12: UART 1 STATE = 3
    C674X_0: GEL Output: Module 13: UART 2 STATE = 3
    C674X_0: GEL Output: Module 16: LCDC STATE = 3
    C674X_0: GEL Output: Module 17: eHRPWM (all) STATE = 3
    C674X_0: GEL Output: Module 20: eCAP (all) STATE = 3
    C674X_0: GEL Output: Module 21: eQEP 0/1 STATE = 3
    C674X_0: GEL Output: Module 24: SCR8 (Br15) STATE = 3
    C674X_0: GEL Output: Module 25: SCR7 (Br12) STATE = 3
    C674X_0: GEL Output: Module 26: SCR12 (Br18) STATE = 3
    C674X_0: GEL Output: Module 31: L3 RAM (Br13) STATE = 3

    So, everything seems to be OK.  now concerning entry point entered in the ARM reset vector, I consider the code by default (0x80000000).

    Considering that my problem may be in binary conversion (so with AISgen Tool),  I modify the Device_init function of DSP UBL to embedds default initialisation (considering settings of dskda830_gel file), then AISgen performs only the minimum, even if my LED remains functional (as before) I still don't jump in ARM UBL (whereas binary is still well copied in 0x80000000).

    Using XDS100V2 probe and code composer 5, I load dsp-ubl-spi.out and performs step by step execution. I wanted to check that after PRUSS process (or DMAX) the ARM code was indeed copied in ARM local RAM (0xFFFF0000) but unfortunately local ARM RAM remains empty (which could explain why I don't jump in ARM UBL as reset vector is not set)

    I consider following code :

    Note: -  to avoid eventual cast effect, I directly put 0x8000000 in armcode[8]

               - PRUSS has been activated before 

    /*PRUSS Module Related Registers*/
    #define DMAXPDSP0_IRAM_BASEADDR 0x01C38000
    #define PRUSS_BASE 0x01C37000

    #define PRUSS_CTRL *(unsigned int*) (PRUSS_BASE + 0x00)
    #define PRUSS_STATUS *(unsigned int*) (PRUSS_BASE + 0x04)

    /************************************************************
    * Local Function Definitions *
    ************************************************************/
    static const unsigned int armBootDmaxCodeConst[] = {
    0x24000080, // Load ARM vector table address to r0
    0x24ffffc0,
    0x24000081, // Load ARM code address to r1
    0x240000c1,
    0xf500e182, // Read ARM code from *r1 to r2,...
    0xe500e082, // Write ARM code from r2,... to *r0
    0x79000000, // Self loop
    };

    static const unsigned int armBootArmCodeConst[] = {
    0xEA000007, // vt0: B boot
    0xEAFFFFFE, // vt0: Self loop
    0xEAFFFFFE, // vt0: Self loop
    0xEAFFFFFE, // vt0: Self loop
    0xEAFFFFFE, // vt0: Self loop
    0xEAFFFFFE, // vt0: Self loop
    0xEAFFFFFE, // vt0: Self loop
    0xEAFFFFFE, // vt0: Self loop
    // jump:, DATA:
    0x80000000,
    // boot:
    0xE51F000C, // LDR R0, jump
    0xE1A0F000, // MOV PC, R0
    };


    void Copy_ARM_RAM_local()
    {
    unsigned int i, *p = (unsigned int *) DMAXPDSP0_IRAM_BASEADDR;
    unsigned int *armCode = (unsigned int *) armBootArmCodeConst;
    unsigned int *dmaxCode = (unsigned int *) armBootDmaxCodeConst;

    // Tell location of armCode to dmax code
    dmaxCode[2] |= ((int) armCode & 0xffff) << 8;
    dmaxCode[3] |= ((int) armCode & 0xffff0000) >> 8;

    // Reset PRUSS unit
    PRUSS_CTRL = 0;

    // Copy dMAX code to its instruction RAM
    for (i = 0; i < sizeof (armBootDmaxCodeConst) / sizeof (int); i++)
    *p++ = dmaxCode[i];

    // Enable dMAX, let it execute the code we just copied
    PRUSS_CTRL |= (1 << 3);
    PRUSS_CTRL |= (1 << 1);

    // Wait for dMAX to finish
    while (PRUSS_STATUS != (sizeof (armBootDmaxCodeConst) / sizeof (int)) - 1);

    // Reset dMAX
    PRUSS_CTRL = 0;
    }


    void DEVICE_enable_ARM(void)
    {
    /* Turn on ARM RAM */
    PSC0_lPSC_enable(0, 7);

    Copy_ARM_RAM_local();

    /* Turn on ARM */
    HOST0CFG = 0x00000001;

    /* Turn on ARM */
    PSC0_lPSC_enableARM(0, 14);
    }

    Any idea why my code is not copied??

    Thanks in advance.

  • Vincent,

    Are you sure, you are powering on the PRUSS(Dmax), I see you resetting the PRUSS in the code but there is no code or function call to power on the PRU in the PSC module in your function Copy_ARM_RAM_local(). The PRU code shouldn`t change from what TI has provided so I do not doubt that part of the code. Also it might be good practice for you to de-assert ARM local reset using the 9th bit of the MDCTL14 in the PSC module while enabling the ARM. I would recommend you to follow the ARM reset sequence that is described here:

    8508.device.c
    /*
     * TI Booting and Flashing Utilities
     *
     * This file provides low-level init functions for use in the UBL for booting
     * an application.
     *
     * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
     * 
     * This program is free software; you can redistribute it and/or
     * modify it under the terms of the GNU General Public License as 
     * published by the Free Software Foundation version 2.
     *
     * This program is distributed "as is" WITHOUT ANY WARRANTY of any
     * kind, whether express or implied; without even the implied warranty
     * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     * GNU General Public License for more details.
     */
    
    /* --------------------------------------------------------------------------
      AUTHOR      : Daniel Allred
    -------------------------------------------------------------------------- */ 
    
    
    
    // This module's header file
    #include "device.h"
    
    
    /************************************************************
    * Explicit External Declarations                            *
    ************************************************************/
    
    
    /************************************************************
    * Local Macro Declarations                                  *
    ************************************************************/
    
    
    /************************************************************
    * Local Typedef Declarations                                *
    ************************************************************/
    
    
    /************************************************************
    * Local Function Declarations                               *
    ************************************************************/
    
    static Uint32 DEVICE_set_ARM_reset_vector (Uint32 address);
    
    
    /************************************************************
    * Local Variable Definitions                                *
    \***********************************************************/
    
    
    /************************************************************
    * Global Variable Definitions                               *
    ************************************************************/
    
    
    /************************************************************
    * Global Function Definitions                               *
    ************************************************************/
    
    
    void DEVICE_LPSCTransition(Uint8 pscnum, Uint8 module, Uint8 domain, Uint8 state)
    {
      DEVICE_PSCRegs *PSC;
      
      if (pscnum == 0)
        PSC = PSC0;
      else if(pscnum == 1)
        PSC = PSC1;
      else
        return; 
    
      // Wait for any outstanding transition to complete
      while ( (PSC->PTSTAT) & (0x00000001 << domain) );
      
      // If we are already in that state, just return
      if (((PSC->MDCTL[module]) & 0x1F) == state) return;
        
      // Perform transition
      PSC->MDCTL[module] = ((PSC->MDCTL[module]) & (0xFFFFFFE0)) | (state);
      PSC->PTCMD |= (0x00000001 << domain);
    
      // Wait for transition to complete
      while ( (PSC->PTSTAT) & (0x00000001 << domain) );
      
      // Wait and verify the state
      while (((PSC->MDSTAT[module]) & 0x1F) != state);	
    }
    
    /*Enable Function for PSC0*/
    DEVICE_LPSC_enableARM () 
    {
    
      // Wait for any outstanding transition to complete
      while ( (PSC0->PTSTAT) & (0x00000001) );
      
      // If we are already in that state, just return
      if (((PSC0->MDCTL[14]) & 0x1F) == 0x3) return;
        
      // Perform transition
      PSC0->MDCTL[14] = ((PSC0->MDCTL[14]) & (0xFFFFFFE0)) | (0x103);
      PSC0->PTCMD |= (0x00000001);
    
      // Wait for transition to complete
      while ( (PSC0->PTSTAT) & (0x00000001) );
      
      // Wait and verify the state
      while (((PSC0->MDSTAT[14]) & 0x1F) != 0x3);	
    }
    
    void DEVICE_enable_ARM(void)
    {
        /* Turn on ARM RAM */
    	DEVICE_LPSCTransition(0, 7, 0, PSC_ENABLE);
    
    	DEVICE_set_ARM_reset_vector(DEVICE_ARM_UBL_LOAD_ADDR);
    
        /* Turn on ARM */
    	DEVICE_LPSCTransition(0, 14, 0, PSC_ENABLE);
    
    	/* de-assert ARM local reset */
    	PSC0->MDCTL[14] |= 0x100;
    }
    
    
    /************************************************************
    * Local Function Definitions                                *
    ************************************************************/
    static const unsigned int armBootDmaxCodeConst[] = {
    	0x24000080,												// Load ARM vector table address to r0
    	0x24ffffc0,
    	0x24000081,												// Load ARM code address to r1
    	0x240000c1,
    	0xf500e182,												// Read ARM code from *r1 to r2,...
    	0xe500e082,												// Write ARM code from r2,... to *r0
    	0x79000000,												// Self loop
    };
    
    static const unsigned int armBootArmCodeConst[] = {
    	0xEA000007,												// vt0: B boot
    	0xEAFFFFFE,												// vt0: Self loop
    	0xEAFFFFFE,												// vt0: Self loop
    	0xEAFFFFFE,												// vt0: Self loop
    	0xEAFFFFFE,												// vt0: Self loop
    	0xEAFFFFFE,												// vt0: Self loop
    	0xEAFFFFFE,												// vt0: Self loop
    	0xEAFFFFFE,												// vt0: Self loop
    	// jump:, DATA:
    	0x00000000,
    	// boot:
    	0xE51F000C,												// LDR R0, jump
    	0xE1A0F000,												// MOV PC, R0
    };
    
    static Uint32 DEVICE_set_ARM_reset_vector (Uint32 address)
    {
    	unsigned int i, *p = (unsigned int *) DMAXPDSP0_IRAM_BASEADDR;
    	unsigned int *armCode = (unsigned int *) armBootArmCodeConst;
    	unsigned int *dmaxCode = (unsigned int *) armBootDmaxCodeConst;
    
    	// Update ARM entry point address
    	armCode[8] = address;
    
    	// Tell location of armCode to PRUSS code
    	dmaxCode[2] |= ((int) armCode & 0xffff) << 8;
    	dmaxCode[3] |= ((int) armCode & 0xffff0000) >> 8;
    
    	// power on PRUSS
    	DEVICE_LPSCTransition(0, 13, 0, PSC_ENABLE);
    
    	// Reset PRUSS
    	DMAXPDSP0->CONTROL = 0;
    
    	// Copy PRUSS code to its instruction RAM
    	for (i = 0; i < sizeof (armBootDmaxCodeConst) / sizeof (int); i++)
    		*p++ = dmaxCode[i];
    
    	// Enable PRUSS, let it execute the code we just copied
    	DMAXPDSP0->CONTROL |= (1 << 3);
    	DMAXPDSP0->CONTROL |= (1 << 1);
    
    	// Wait for PRUSS to finish
    	while (DMAXPDSP0->STATUS != (sizeof (armBootDmaxCodeConst) / sizeof (int)) - 1);
    
    	// Reset PRUSS
    	DMAXPDSP0->CONTROL = 0;
    
    	// Wake-up ARM
    	SYSTEM->HOSTCFG[0] = 0x00000001;
    
    	return E_PASS;
    }
    
    
    
    /***********************************************************
    * End file                                                 *
    ***********************************************************/
    
    
    

    Regards,

    Rahul

  • Rahul,

    I continue my investigation and I have made the following procedure :

     * Execute dsp-ubl.out with CCS DSP Side and stop before to enable psc 14 ARM

    *  take control with CCS ARM side where I have checked that expected code was present at 0xFFFF0000 and then performing step by step execution and finally succeeds to jump at 0x80000000

    * Then I continue step by step execution (because I was very happy :) and then I hit 0xFFFFFFFF instruction??? which inevitabely put he ARM in exeception (jumping in reset vector at 0xFFFF0004 and infinite loop)

    So, I have thought initially that I have missed something during SPI copy but with an hexadecimal editor I have checked the arm-ubl binary generated by AISgen and I confirm there are a lot of 0xFFFFFFFF instructions inside of it which I suppose is not normal....

    So my problem seems to be a binary generation issue...

    any advice ??

  • Thank you Rahul

    I'm going to enter a new post because i'm still a little bit confused with binaries build