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C6747 SPI PSP and Chip Select operation

I need help to configure the SPI PSP drivers to interface with a slave device in the following format:

  • C6747 is master
  • mode is Spi_PinOpMode_SPISCS_4PIN
  • opmode is Spi_OpMode_DMAINTERRUPT (e.g. EDMA is used to facilitate transfer of multiple data words)
  • data word is 8 bits.
  • Chip Select must be deactivated momentarily between each 8 bit transfer.

The last bullet is what I can't get working.  There is either a bug in the PSP driver or I'm not setting a field correctly.

I have CSHOLD set to 0.  I enable the wait delay and set the delay value very high.  When I capture the output on a scope,

I do not see the the CS toggle inactive and back to active between successive bytes.  It remains active until all bytes have been sent out.  Then goes back to inactive after a LONG delay (30-40 useconds).

Also note that the C2TDELAY and T2CDELAY times don't seem to work either.  These delay times are VERY LONG relative to what the SPI user's guide states they should be.  I think this may be related to the PSP driver with the DMA mode enabled?  Can someone from TI confirm?  Or tell me what fields need to be set to get SPI CS to toggle between data word transfers?

thanks,

Mike

  • Hi Mike,

    I did a quick check on the two issues that you have mentioned.

    • CSHOLD

    I see that the CS is getting toggled in when Spi_CSHOLD is not set in the dataparam flags. Please ensure that flags field is indeed zero. Also, this can be ensured by looking at the CSHOLD bit field value in the SPIDAT1 register. IMHO it would be better to set dataparam flags to zero and verify. Do you have set any other flags?

    • c2t/t2c delays

    I did a test on this too. I specified a t2c and c2t delay of 100 which should result in the 102 SPI module clock cycles, which would be (102/150000000 = .68us). I see delay of 0.7uS approx. Please note that the clock delay is wrt the SPI module clock which is (1/150000000) when the CPU is running at 300MHz

    Which version of PSP drivers are you using? I have verifed this on 01.30.00.

  • Fyi, below is a wiki article that explains the SPI features like CSHOLD and delays a bit more...

    http://wiki.davincidsp.com/index.php/Using_SPI_Chip_Select_Pin_on_C674x/OMAP-L1x

     

  • Thank you for the responses.  I checked the versions of drivers.  I am using PSP 01.20.00 and EDMA 01.06.00.01.  I checked the updates and didn't see a PSP version 01.30.00 - just 01.30.05 which is not a GA release.  I also checked the release notes in the PSP and didn't any mention of the problem I am seeing as a know issue or something that was fixed.  I can try and I upgrade but I want to confirm that will fix my issue before doing so.  I have to modify the EDMA and parts of the PSP files because the builds were too big for our application.  I would have to do the same for any new PSP release so don't want to do this unless I have to.

    So Madhvapathi, can you send me all the settings you had for your SPI PSP parameters so I can compare.  Here is what I have for my settings:

      
    int_fast8_t initialize_spi1_driver()
    {
    GIO_Attrs gioAttrs = GIO_ATTRS;
    Spi_ChanParams chanParams;
    Int gio_create_status;
    int_fast8_t result_code; /* return 0 for successful driver initialization. */

    chanParams.hEdma = hEdma; /* SPI driver needs handle to edma for DMA mode. */

    /* create SPI channel for transmission */
    spi1_handle = GIO_create("/Spi1", IOM_INOUT, &gio_create_status,
    &chanParams, &gioAttrs);
    if(NULL == spi1_handle) {
    result_code = SP1_DRIVER_CREATE_FAIL;
    } else {
    result_code = SPI1_DRIVER_CREATE_SUCCESS;
    }

    spi1_dataparams.bufLen = 0;
    spi1_dataparams.inBuffer = (Uint8 *)&spi1_read_buffer[0];
    spi1_dataparams.outBuffer = (Uint8 *)&spi1_write_buffer[0];
    /* use the following flag to indicate that SPI CS pin is held active between
    successive data word transactions. */
    spi1_dataparams.flags = 0; //Spi_CSHOLD;
    spi1_dataparams.chipSelect = 0x01;
    spi1_dataparams.dataFormat = Spi_DataFormat_0;
    hSpi1_dataparams = &spi1_dataparams;

    return(result_code);
    }
    
    

    ...

    void spi1_user_init()
    {
    spi1_params = Spi_PARAMS;

    spi1_params.hwiNumber = 8;
    spi1_params.opMode = Spi_OpMode_DMAINTERRUPT;

    /* this setting is a little bit deceiving. The output clock cannot
    be set to any integer value. It is translated into a prescale value
    for the SPI memory-mapped registers. The SPI clock will run at
    SYSCLK2 / prescale value. It seems like the PSP code will choose
    a prescale value that will produce a clock frequency nearest to that
    set by this field. */
    spi1_params.outputClkFreq = 1000000; /* 1 MHz */
    spi1_params.loopbackEnabled = FALSE;
    spi1_params.edmaHandle = NULL;
    spi1_params.spiHWCfgData.waitDelay = TRUE;

    spi1_params.spiHWCfgData.pinOpModes = Spi_PinOpMode_SPISCS_4PIN;
    spi1_params.spiHWCfgData.intrLevel = TRUE; /* map ints to INT1 */
    spi1_params.spiHWCfgData.csDefault = 1;

    spi1_params.spiHWCfgData.configDatafmt[0].wDelay = 63;
    spi1_params.spiHWCfgData.configDatafmt[0].charLength = 8;
    spi1_params.spiHWCfgData.configDatafmt[0].clkHigh = TRUE;
    spi1_params.spiHWCfgData.configDatafmt[0].lsbFirst = FALSE;
    spi1_params.spiHWCfgData.configDatafmt[0].oddParity = FALSE;
    spi1_params.spiHWCfgData.configDatafmt[0].parityEnable = FALSE;
    spi1_params.spiHWCfgData.configDatafmt[0].phaseIn = FALSE;
    spi1_params.spiHWCfgData.configDatafmt[0].waitEnable = FALSE;
      Spi_init(SPI_DEVICE1);
    }
    thanks,
    Mike

  • Another somewhat related question.  Why is the SPI clock frequency a module wide parameter, (e.g. a main field in the Spi_Params structure.) ?  The clock can be different for each of the data formats so it makes more sense to have this as a field in the Spi_ConfigDataFmt so a different clock can be preassigned for each data format that will be used.

    thanks,

    Mike

  • Mike said:

    Thank you for the responses.  I checked the versions of drivers.  I am using PSP 01.20.00 and EDMA 01.06.00.01.  I checked the updates and didn't see a PSP version 01.30.00 - just 01.30.05 which is not a GA release. 

    
    

    Our software download site changed to a new address/server a few months ago.  I imagine you're looking at the "legacy" releases.  Start at this page.  For C6747 PSP you'll then want to click on "BIOS Platform Support Packages" and then you'll see PSP 1.30.00.

    The release notes also state:

    "The GPIO Chip Select feature implementation of SPI driver has undergone

    changes. This is to include provision for using more than on GPIO as Chip selecte.

    The instance parameters and the I/O request (submit time) parameters have

    undergone changes. Please refer to the SPI section of User guide for more

    details."

    I recommend getting on that most recent driver release so that you all the latest features and bug fixes.

  • I found my problem.  Another part of the code was setting the flags field (e.g. CSHOLD) back to 1 after it was initialized to 0.  So now I can see the CS feature operating properly.  And this is on PSP version 01.20 and EDMA 01.06.01.  I'll try and upgrade to the newer versions soon but it is a lot of work to make the same changes for each new PSP release so I need be prudent about this.  Do any of you know if the newest releases of PSP and EDMA reduced the memory usage from earlier versions?

    Mike