C674x SUB instruction has not worked

Daisuke Maeda

Guru 20205 points

In the following assembly code, B0 is not decremented with SUB instruction. SUB instruction seems not to work.

03288265            LDW.D1T1      *+A10[4],A6
032882E7 ||         LDW.D2T2      *+B10[4],B6
0003E1A2 ||         SUB.S2        B0,1,B0
2FFFF693     [ B0] B.S2          LOOP (PC-76 = 0x1181e494)
06B1BE19 ||         ADDSP.S1X     A13,B12,A13
06B1B21B ||         ADDSP.L2X     B13,A12,B13
03A8C265 ||         LDW.D1T1      *+A10[6],A7
03A8C2E6 ||         LDW.D2T2      *+B10[6],B7

Please see the attached file for a series of assembly code:

Fullscreen original.txt Download

07BE9DC2            SUBAW.D2      SP,0x14,SP
07BC18F1            OR.D1X        0,SP,FP
07BC22F4 ||         STW.D2T1      FP,*+SP[1]
073C42F5            STW.D2T1      A14,*+SP[2]
073CE276 ||         STW.D1T2      DP,*+FP[7]
06BC62F5            STW.D2T1      A13,*+SP[3]
06BD0276 ||         STW.D1T2      B13,*+FP[8]
063C82F5            STW.D2T1      A12,*+SP[4]
063D2276 ||         STW.D1T2      B12,*+FP[9]
05BCA2F5            STW.D2T1      A11,*+SP[5]
05BD4276 ||         STW.D1T2      B11,*+FP[10]
053CC2F5            STW.D2T1      A10,*+SP[6]
053D6276 ||         STW.D1T2      B10,*+FP[11]
071808F1            OR.D1         0,A6,A14
071816A3 ||         OR.S2X        0,A6,DP
051816A1 ||         OR.S1X        0,B6,A10
05183D42 ||         ADDAW.D2      B6,0x1,B10
029018F3            OR.D2X        0,A4,B5
029018F1 ||         OR.D1X        0,B4,A5
000002AA ||         MVK.S2        0x0005,B0
04383765            LDDW.D1T1     *A14++[1],A9:A8
043837E6 ||         LDDW.D2T2     *DP++[1],B9:B8
03280265            LDW.D1T1      *+A10[0],A6
032802E6 ||         LDW.D2T2      *+B10[0],B6
04383765            LDDW.D1T1     *A14++[1],A9:A8
043837E6 ||         LDDW.D2T2     *DP++[1],B9:B8
03A84265            LDW.D1T1      *+A10[2],A7
03A842E6 ||         LDW.D2T2      *+B10[2],B7
00000000            NOP           
          LOOP:
06A0BE03            MPYSP.M2X     B5,A8,B13
06911E00 ||         MPYSP.M1X     A8,B4,A13
06249E03            MPYSP.M2X     B4,A9,B12
06153E00 ||         MPYSP.M1X     A9,B5,A12
06A0BE03            MPYSP.M2X     B5,A8,B13
06911E00 ||         MPYSP.M1X     A8,B4,A13
06249E03            MPYSP.M2X     B4,A9,B12
06153E00 ||         MPYSP.M1X     A9,B5,A12
0119BE1B            ADDSP.S2X     B13,A6,B2
0119BEB8 ||         SUBSP.S1X     B6,A13,A2
05B018F1            OR.D1X        0,B12,A11
05B018F2 ||         OR.D2X        0,A12,B11
06B4FE19            ADDSP.S1X     A7,B13,A13
06B4FE3A ||         SUBSP.S2X     B7,A13,B13
00000000            NOP           
05897E19            ADDSP.S1X     A11,B2,A11
05897E1A ||         ADDSP.S2X     B11,A2,B11
03288265            LDW.D1T1      *+A10[4],A6
032882E7 ||         LDW.D2T2      *+B10[4],B6
0003E1A2 ||         SUB.S2        B0,1,B0
2FFFF693     [ B0]  B.S2          LOOP (PC-76 = 0x1181e494)
06B1BE19 ||         ADDSP.S1X     A13,B12,A13
06B1B21B ||         ADDSP.L2X     B13,A12,B13
03A8C265 ||         LDW.D1T1      *+A10[6],A7
03A8C2E6 ||         LDW.D2T2      *+B10[6],B7
04383765            LDDW.D1T1     *A14++[1],A9:A8
043837E6 ||         LDDW.D2T2     *DP++[1],B9:B8
05A85675            STW.D1T1      A11,*A10++[2]
05A856F6 ||         STW.D2T2      B11,*B10++[2]
04383765            LDDW.D1T1     *A14++[1],A9:A8
043837E6 ||         LDDW.D2T2     *DP++[1],B9:B8
06A85675            STW.D1T1      A13,*A10++[2]
06A856F6 ||         STW.D2T2      B13,*B10++[2]
00000000            NOP           
07BC18F0            OR.D1X        0,SP,FP
053CC2E5            LDW.D2T1      *+SP[6],A10
053D6266 ||         LDW.D1T2      *+FP[11],B10
05BCA2E5            LDW.D2T1      *+SP[5],A11
05BD4266 ||         LDW.D1T2      *+FP[10],B11
063C82E5            LDW.D2T1      *+SP[4],A12
063D2266 ||         LDW.D1T2      *+FP[9],B12
06BC62E5            LDW.D2T1      *+SP[3],A13
06BD0266 ||         LDW.D1T2      *+FP[8],B13
073C42E5            LDW.D2T1      *+SP[2],A14
073CE267 ||         LDW.D1T2      *+FP[7],DP
000C0362 ||         B.S2          B3
07BC22E4            LDW.D2T1      *+SP[1],FP
178014FE            ADDAW.D2      B15,20,SP
00000000            NOP           
00000000            NOP           
00000000            NOP

In the following assembly code, B0 is decremented with SUB instruction. SUB instruction works with .L2 unit.

03288265            LDW.D1T1      *+A10[4],A6
032882E7 ||         LDW.D2T2      *+B10[4],B6
0003E05A ||         SUB.L2        B0,1,B0
2FFFF693     [ B0] B.S2          LOOP (PC-76 = 0x1181e494)
06B1BE19 ||         ADDSP.S1X     A13,B12,A13
06B1B21B ||         ADDSP.L2X     B13,A12,B13
03A8C265 ||         LDW.D1T1      *+A10[6],A7
03A8C2E6 ||         LDW.D2T2      *+B10[6],B7

Please see the attached file for a series of assembly code:

Fullscreen modified.txt Download

07BE9DC2            SUBAW.D2      SP,0x14,SP
07BC18F1            OR.D1X        0,SP,FP
07BC22F4 ||         STW.D2T1      FP,*+SP[1]
073C42F5            STW.D2T1      A14,*+SP[2]
073CE276 ||         STW.D1T2      DP,*+FP[7]
06BC62F5            STW.D2T1      A13,*+SP[3]
06BD0276 ||         STW.D1T2      B13,*+FP[8]
063C82F5            STW.D2T1      A12,*+SP[4]
063D2276 ||         STW.D1T2      B12,*+FP[9]
05BCA2F5            STW.D2T1      A11,*+SP[5]
05BD4276 ||         STW.D1T2      B11,*+FP[10]
053CC2F5            STW.D2T1      A10,*+SP[6]
053D6276 ||         STW.D1T2      B10,*+FP[11]
071808F1            OR.D1         0,A6,A14
071816A3 ||         OR.S2X        0,A6,DP
051816A1 ||         OR.S1X        0,B6,A10
05183D42 ||         ADDAW.D2      B6,0x1,B10
029018F3            OR.D2X        0,A4,B5
029018F1 ||         OR.D1X        0,B4,A5
000002AA ||         MVK.S2        0x0005,B0
04383765            LDDW.D1T1     *A14++[1],A9:A8
043837E6 ||         LDDW.D2T2     *DP++[1],B9:B8
03280265            LDW.D1T1      *+A10[0],A6
032802E6 ||         LDW.D2T2      *+B10[0],B6
04383765            LDDW.D1T1     *A14++[1],A9:A8
043837E6 ||         LDDW.D2T2     *DP++[1],B9:B8
03A84265            LDW.D1T1      *+A10[2],A7
03A842E6 ||         LDW.D2T2      *+B10[2],B7
00000000            NOP           
          LOOP:
06A0BE03            MPYSP.M2X     B5,A8,B13
06911E00 ||         MPYSP.M1X     A8,B4,A13
06249E03            MPYSP.M2X     B4,A9,B12
06153E00 ||         MPYSP.M1X     A9,B5,A12
06A0BE03            MPYSP.M2X     B5,A8,B13
06911E00 ||         MPYSP.M1X     A8,B4,A13
06249E03            MPYSP.M2X     B4,A9,B12
06153E00 ||         MPYSP.M1X     A9,B5,A12
0119BE1B            ADDSP.S2X     B13,A6,B2
0119BEB8 ||         SUBSP.S1X     B6,A13,A2
05B018F1            OR.D1X        0,B12,A11
05B018F2 ||         OR.D2X        0,A12,B11
06B4FE19            ADDSP.S1X     A7,B13,A13
06B4FE3A ||         SUBSP.S2X     B7,A13,B13
00000000            NOP           
05897E19            ADDSP.S1X     A11,B2,A11
05897E1A ||         ADDSP.S2X     B11,A2,B11
03288265            LDW.D1T1      *+A10[4],A6
032882E7 ||         LDW.D2T2      *+B10[4],B6
0003E05A ||         SUB.L2        B0,1,B0
2FFFF693     [ B0]  B.S2          LOOP (PC-76 = 0x1181e494)
06B1BE19 ||         ADDSP.S1X     A13,B12,A13
06B1B21B ||         ADDSP.L2X     B13,A12,B13
03A8C265 ||         LDW.D1T1      *+A10[6],A7
03A8C2E6 ||         LDW.D2T2      *+B10[6],B7
04383765            LDDW.D1T1     *A14++[1],A9:A8
043837E6 ||         LDDW.D2T2     *DP++[1],B9:B8
05A85675            STW.D1T1      A11,*A10++[2]
05A856F6 ||         STW.D2T2      B11,*B10++[2]
04383765            LDDW.D1T1     *A14++[1],A9:A8
043837E6 ||         LDDW.D2T2     *DP++[1],B9:B8
06A85675            STW.D1T1      A13,*A10++[2]
06A856F6 ||         STW.D2T2      B13,*B10++[2]
00000000            NOP           
07BC18F0            OR.D1X        0,SP,FP
053CC2E5            LDW.D2T1      *+SP[6],A10
053D6266 ||         LDW.D1T2      *+FP[11],B10
05BCA2E5            LDW.D2T1      *+SP[5],A11
05BD4266 ||         LDW.D1T2      *+FP[10],B11
063C82E5            LDW.D2T1      *+SP[4],A12
063D2266 ||         LDW.D1T2      *+FP[9],B12
06BC62E5            LDW.D2T1      *+SP[3],A13
06BD0266 ||         LDW.D1T2      *+FP[8],B13
073C42E5            LDW.D2T1      *+SP[2],A14
073CE267 ||         LDW.D1T2      *+FP[7],DP
000C0362 ||         B.S2          B3
07BC22E4            LDW.D2T1      *+SP[1],FP
178014FE            ADDAW.D2      B15,20,SP
00000000            NOP           
00000000            NOP           
00000000            NOP

Why does the SUB instruction not work in the first assembly code?

Best regards,

Daisuke

over 10 years ago

0 Sivaraj Kuppuraj over 10 years ago

TI__Mastermind 35645 points

Hi,

Thanks for your post.

Please note that subtraction with a signed constant (SUB Instruction) on the .L and .S units which would allow either the first or the second operand to be the signed 5-bit constant. Actually, the argument ordering for the .L and .S unit forms of .S2 is not consistent explicitly in SUB instruction unlike other instructions like SUB2, SUBDP, SUBSP.

For more details, please refer the c674x DSP instruction set reference guide for SUB, SUB2 instructions as below:

http://www.ti.com/lit/ug/sprufe8b/sprufe8b.pdf

So, I would recommend you to use SUB2 instead of SUB in the first assembly code and try the SUB2 instruction as like below:

SUB2.S2 B0,1,B0

Kindly try in the above way for the first assembly code.

Thanks & regards,

Sivaraj K

-------------------------------------------------------------------------------------------------------

Please click the Verify Answer button on this post if it answers your question.

-------------------------------------------------------------------------------------------------------

0 Daisuke Maeda over 10 years ago in reply to Sivaraj Kuppuraj

Guru 20205 points

Hi Sivaraj K,

Thank you for your reply.

I referred to the c674x DSP instruction set reference guide.

I understand that a constant value cannot be subtracted on the .L and .S units because SUB instruction with a 5-bit constant on each unit only allows the following argument orders.

SUB (.L1 or .L2) scst5, src2, dst
Execution: scst5 - src2 → dst

SUB (.S1 or .S2) scst5, src2, dst
Execution: scst5 - src2 → dst

SUB (.D1 or .D2) src2, ucst5, dst (if the cross path form is not used)
Execution: src2 - ucst5 → dst

NOTE in the reference guide describes: "SUB (.unit) src1, scst5, dst is encoded as ADD (.unit) -scst5, src2, dst
where the src1 register is now src2 and scst5 is now -scst5."

Does this mean that SUB instruction with the second operand of a constant value on the .L and .S units is encoded as ADD instruction by Assembler in the software development process?

Best regards,

Daisuke

0 Sivaraj Kuppuraj over 10 years ago in reply to Daisuke Maeda

TI__Mastermind 35645 points

Hi,

Yes, you are right. The SUB instruction on the .L and .S units would be encoded as ADD instruction by the assembler.

Thanks & regards,

Sivaraj K

-------------------------------------------------------------------------------------------------------

Please click the Verify Answer button on this post if it answers your question.

-------------------------------------------------------------------------------------------------------

0 Daisuke Maeda over 10 years ago in reply to Sivaraj Kuppuraj

Guru 20205 points

Hi Sivaraj K,

Thank you for your reply.

The first assembly code that I showed above was generated from the following code by the code generation tool.

   LDW   *+A_hh_ptr[4],A_hh_Re1
||  LDW   *+B_hh_ptr[4],B_hh_Im1
||  SUB   B_i,1,B_i

[B_i] B   LOOP
||  ADDSP  B_tmp1,A_tmp0,A_tmp0
||  ADDSP  A_tmp1,B_tmp0,B_tmp0
||  LDW   *+A_hh_ptr[6],A_hh_Re2
||  LDW   *+B_hh_ptr[6],B_hh_Im2

When using an instruction that the argument ordering is not consistent explicitly such as SUB instruction, should the user assign a functional unit?

For example:

SUB.D2 B_i,1,B_i

ADD.L2 -1,B_i,B_i

Best regards,

Daisuke

0 Daisuke Maeda over 10 years ago in reply to Sivaraj Kuppuraj

Guru 20205 points

Hi Sivaraj K,

I tried using ADD instruction instead of SUB instruction, but the code that is not expected as below was generated, it seems that ADD instruction was encoded as SUB instruction.

|| ADD -1,B_i,B_i → 0003E1A2 || SUB.S2 B0,1,B0

|| ADD.S2 -1,B_i,B_i → 0003E1A2 || SUB.S2 B0,1,B0

|| ADD.L2 -1,B_i,B_i → 0003E05A || SUB.L2 B0,1,B0

I referred to the Introduction to TMS320C6000 DSP Optimization Application Report as below:

www.ti.com/.../sprabf2.pdf

The example code in the section 2.1.4 on the application report is described as below. SUB instruction is used with the second operand of constant value on the .S unit.

Loop: ldw    .D1   *A4++,A5
||         ldw    .D2   *B4++,B5
|| [B0] sub    .S2   B0,1,B0
|| [B0] B        .S1   loop
||        mpy    .M1 A5,B5,A6
||        mpyh .M2 A5,B5,B6
||        add     .L1   A7,A6,A7
||        add     .L2   B7,B6,B7

I am confused! How can the code to decrement a value be written?

Best regards,

Daisuke

0 Sivaraj Kuppuraj over 10 years ago in reply to Daisuke Maeda

TI__Mastermind 35645 points

Hi,

I would recommend you to use SUB2 instead of SUB in the first assembly code and try with SUB2 instruction as like below:

SUB2.S2 B0,1,B0

Thanks & regards,

Sivaraj K

-------------------------------------------------------------------------------------------------------

Please click the Verify Answer button on this post if it answers your question.

-------------------------------------------------------------------------------------------------------

0 Daisuke Maeda over 10 years ago in reply to Sivaraj Kuppuraj

Guru 20205 points

Hi Sivaraj K,

Thank you for your reply.

Using SUB2 instruction cannot be built for an error:

[E0800] Erroneous use of cross path

SUB2 instruction seems to not allow using the operand as a constant value. Using SUB2 instruction with a constant value is not mentioned in the instruction set reference guide.

Using SUB instruction with the second operand as constant value on the .L or .S unit often appears in the built program, but most work correctly.

For example:

0003E05A || SUB.L2 B0,1,B0

0003E1A3 SUB.S2 B0,1,B0

Is using SUB instruction with the second operand as constant value on the .L or .S unit really invalid? If so, is it a bug that the code generation tool assigns .L or .S unit?

Best regards,

Daisuke

Processors

Processors forum

C674x SUB instruction has not worked