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Shared memory access

Alexandre Amiez
Intellectual 270 points
Other Parts Discussed in Thread: OMAPL138

Hi,

I am working on a distributed operating system bewteen the ARM core et DSP core on the OMAPL138 processor. I am wondering :

1- is there a "test-and-set" function available for the shared memory access on the OMAPL138 processor ?

2- I read that the shared memory was completely cached. Can we change that ?

Otherwise have i to use ARM-DSP communication Interrupts and cache invalidate and write-back functions to access to shared memory ?

Thanks for your help

Regars

Alex

 

  • 0
    TI__Genius 17355 points

    Alex,

    Can you be more specific about what you are looking for?  When you say "shared memory", do you mean the L3 shared memory or do you mean something else (like a buffer in DDR set aside for sharing data between the two cores)?

    Regards, Daniel

  • 0 in reply to Daniel Allred
    Intellectual 270 points

    Hi Daniel,

    When i say "shared memory" i mean L3 shared memory.

    I would like developp high speed communication between the ARM et DSP applications using shared memory. I would like to know if you are a test-and-set function to ensure the memory protection.

     

    Regards

    Alex

  • 0 in reply to Alexandre Amiez
    TI__Genius 17355 points

    It sounds like you are looking for a multi-processor mutex/semaphore or some atomic operations so that the two cores don't contend over the memory contents.  I don't think there is anything in the hardware that does exactly this, so I think a software solution of some kind would need to be created.

    Regards, Daniel