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DM3730 display - Low DSI1 FCLK leading to failures when scaling ratios are high

Srinivas Marakala1
Intellectual 560 points
Other Parts Discussed in Thread: DM3730

We are working on DM3730 based custom device

I am seeing following error when our camera application is in portrait mode.

omapdss DISPC error: failed to set up scaling, required fclk rate = 64864864 Hz, current fclk rate = 60000000 Hz

When Camera application is in portrait mode, source rectangle is 640x480 (wxh) and destination rectangle is 297x396 (wxh). Seems like fclk requirement for scaling is crossing than what we have (60MHz). I tried increasing the dsi1 flck by doubling the req_pck in dsi_pll_calc_clock_div_pck function in dsi.c file. But this seems to have side effects. First one is PCLK calculation is mismatching and display is not coming up. I adjusted pck_div and could get required pclk but I could see lot of flashes in video.

In TRM it is mentioned that it can go up 100/173MHz and can be usually set as 90MHz. How can I increase the DSI1 FCLK? What are the things I need to take care while increasing the FCLK.

  • 0
    TI__Guru 65405 points

    Hi Srinivas,

    The maximum frequency of the DSI1 FCLK depends on the voltage which you are using: Up to 173 MHz at nominal voltage (OPP3), and up to 96 MHz at low voltage (OPP2). You can fing information about calculation of the PLL output frequency in the TRM - 7.4.4.3 DSI PLL Operations.

    BR

    Tsvetolin Shulev

  • 0 in reply to Cvetolin Shulev-XID
    Intellectual 560 points

    Hi Tsvetolin Shulev,

    Thanks for the response. It helped me.

    Our panel PCLK is 30 MHz and based on this TI Android SW release for OMAP 3 (DM3730) is setting DSI1 FCLK to 60MHz. However TRM section 7.5.5.5 has an example calculation for PCLK 30MHz to set FCLK 90MHz. I found SW code is not exactly doing the same and it varies in values for CLKIN4ADDR and REGM. Anyway that's not a big deal.

    If I increase the FCLK to 90MHz, will there be any (considerable) power number difference from FCLK running at 60MHz.

    Thanks,

    Srinivas

  • 0 in reply to Srinivas Marakala1
    TI__Guru 65405 points

    Hi Srinivas,

    I don't expect any problems if you increase the FCLK to 90 MHz.The power consumption should be increased but insignificantly. I haven't exact values, but according TRM - The DSI1_PLL_FCLK and DSI2_PLL_FCLK frequencies must be lower than 173 MHz at nominal voltage (OPP100), and lower than 100 MHz at low voltage (OPP50).

    Therefore the frequency of 90 MHz which you wont to use is under the limits.

    BR

    Tsvetolin Shulev