This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

McBSP SPI Example

Other Parts Discussed in Thread: DAC7611, ADS8320, ADS8325

Hello all,

I am using McBSP0 on the C6713 to control a DAC and ADC at the same time. The DAC (TI's DAC7611) is working fine. However, I can't get the ADC (TI's ADS8320) to work!!!

 

Any ideas on how the receive part of the McBSP should be configured for this purpose??

 

This is my current configuration:

MCBSP_Config DAC_Control = {

MCBSP_FMKS(SPCR, FREE, NO)        |

MCBSP_FMKS(SPCR, SOFT, NO)        |

MCBSP_FMKS(SPCR, FRST, YES)       |

MCBSP_FMKS(SPCR, GRST, YES)       |

MCBSP_FMKS(SPCR, XINTM, XRDY)     |

MCBSP_FMKS(SPCR, XSYNCERR, NO)    |

MCBSP_FMKS(SPCR, XRST, YES)       |

MCBSP_FMKS(SPCR, DLB, OFF)        |

MCBSP_FMKS(SPCR, RJUST, RZF)      |

MCBSP_FMKS(SPCR, CLKSTP, NODELAY) |

MCBSP_FMKS(SPCR, DXENA, OFF)      |

MCBSP_FMKS(SPCR, RINTM, RRDY)     |

MCBSP_FMKS(SPCR, RSYNCERR, NO)    |

MCBSP_FMKS(SPCR, RRST, NO),

 

MCBSP_FMKS(RCR, RPHASE, SINGLE)   |

MCBSP_FMKS(RCR, RFRLEN2, DEFAULT) |

MCBSP_FMKS(RCR, RWDLEN2, DEFAULT) |

MCBSP_FMKS(RCR, RCOMPAND, MSB)    |

MCBSP_FMKS(RCR, RFIG, NO)         |

MCBSP_FMKS(RCR, RDATDLY, OF(1))   |

MCBSP_FMKS(RCR, RFRLEN1, OF(0))   |

MCBSP_FMKS(RCR, RWDLEN1, 24BIT)   |

MCBSP_FMKS(RCR, RWDREVRS, DISABLE),

 

MCBSP_FMKS(XCR, XPHASE, SINGLE)   |

MCBSP_FMKS(XCR, XFRLEN2, DEFAULT) |

MCBSP_FMKS(XCR, XWDLEN2, DEFAULT) |

MCBSP_FMKS(XCR, XCOMPAND, MSB)    |

MCBSP_FMKS(XCR, XFIG, NO)         |

MCBSP_FMKS(XCR, XDATDLY, OF(1))   |

MCBSP_FMKS(XCR, XFRLEN1, OF(0))   |

MCBSP_FMKS(XCR, XWDLEN1, 12BIT)   |

MCBSP_FMKS(XCR, XWDREVRS, DISABLE),

 

MCBSP_FMKS(SRGR, GSYNC, FREE)     |

MCBSP_FMKS(SRGR, CLKSP, DEFAULT)  |

MCBSP_FMKS(SRGR, CLKSM, INTERNAL) |

MCBSP_FMKS(SRGR, FSGM, DXR2XSR)  |

MCBSP_FMKS(SRGR, FPER, OF(30))    |

MCBSP_FMKS(SRGR, FWID, OF(12))    |

MCBSP_FMKS(SRGR, CLKGDV, OF(25)),

 

MCBSP_MCR_DEFAULT,

MCBSP_RCER_DEFAULT,

MCBSP_XCER_DEFAULT,

 

MCBSP_FMKS(PCR, XIOEN, SP)        |

MCBSP_FMKS(PCR, RIOEN, SP)        |

MCBSP_FMKS(PCR, FSXM, INTERNAL)   |

MCBSP_FMKS(PCR, FSRM, INTERNAL)   |

MCBSP_FMKS(PCR, CLKXM, OUTPUT)    |

MCBSP_FMKS(PCR, CLKRM, OUTPUT)    |

MCBSP_FMKS(PCR, CLKSSTAT, DEFAULT)|

MCBSP_FMKS(PCR, DXSTAT, DEFAULT)  |

MCBSP_FMKS(PCR, FSXP, ACTIVELOW)  |

MCBSP_FMKS(PCR, FSRP, ACTIVEHIGH) |

MCBSP_FMKS(PCR, CLKXP, RISING)    |

MCBSP_FMKS(PCR, CLKRP, RISING)

};

  • One thing that jumps out at me is the fact that XWDLEN1 and RWDLEN1 do not match.  The transmitter and receiver are both clocked off CLKX/FSX.  So CLKX/FSX appear to be programmed to output 12 bits of data for a word.  However, the receiver is configured to input 24 bits of data.  Since it will never get more than 12 I don't think you'll ever get anything (or that's my theory anyway!).

  • Could you describe or sketch your connectivity? Even if there is mismatch in the length of bit the DSP should expect, you should still recieve something. Would be good to match you McBSP setting (recieve) to that in "Interfacing the ADS8320/ADS8325 to TMS320C6711 DSP" I hope its helpful