Hi there
We want to use ehrpwm1 to dim the LED indicator except ecap for LCD backlight.
We want it start in very beginning, so we put it in uboot.
We check the document TRM.
We try to add the code in the file board/siemens/pxm2/board.c of u-boot.
static int enable_pwm(void)
{
struct pwmss_regs *pwmss = (struct pwmss_regs *)PWMSS0_BASE;
struct pwmss_ecap_regs *ecap;
int ticks = PWM_TICKS;
int duty = PWM_DUTY;
#ifdef LED_PWM
struct pwmss_regs *pwmss1 = (struct pwmss_regs *)PWMSS1_BASE;
struct pwmss_epwm_regs *epwm;
#endif
ecap = (struct pwmss_ecap_regs *)AM33XX_ECAP0_BASE;
/* enable clock */
setbits_le32(&pwmss->clkconfig, ECAP_CLK_EN);
/* TimeStam Counter register */
writel(0xdb9, &ecap->tsctr);
/* config period */
writel(ticks - 1, &ecap->cap3);
writel(ticks - 1, &ecap->cap1);
setbits_le16(&ecap->ecctl2,
(ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0));
/* config duty */
writel(duty, &ecap->cap2);
writel(duty, &ecap->cap4);
/* start */
setbits_le16(&ecap->ecctl2, ECTRL2_CTRSTP_FREERUN);
#ifdef LED_PWM /* ehrpwm1A */
epwm = (struct pwmss_epwm_regs *)AM33XX_EPWM1_BASE;
/* enable clock */
setbits_le32(&pwmss1->clkconfig, EPWM_CLK_EN);
#if 0
setbits_le16(&epwm->tbprd, 1200);
// setbits_le16(&epwm->tbctl, TBCTL_SYNCOSEL);
// setbits_le16(&epwm->aqctla, ((1<<2)|(2<<4)));
#else
writel(0, &epwm->tbctl);
// writel(1200<<16, &epwm->tbprd);
// writew(TBCTL_SYNCOSEL, &epwm->tbctl);
// writew(((1<<2)|(2<<4)), &epwm->aqctla);
#endif
#endif
return 0;
}
When we try to write the register after 0x48302200(AM33XX_EPWM1_BASE)
It shows below and reset again.
U-Boot SPL 2013.10-00198-gb348f87-dirty (Feb 18 2016 - 23:33:42)
reading u-boot.img
reading u-boot.img
U-Boot 2013.10-00198-gb348f87-dirty (Feb 18 2016 - 23:33:42)
I2C: ready
DRAM: 512 MiB
data abort
MAYBE you should read doc/README.arm-unaligned-accesses
pc : [<9ff84c80>] lr : [<9ff84c24>]
sp : 9ef49ee8 ip : 00000045 fp : 80100020
r10: 80111d7c r9 : 9ef49f30 r8 : 4030cdcc
r7 : 4030cb7c r6 : 00000002 r5 : 00028bd0 r4 : 00000000
r3 : 48302000 r2 : 0000012a r1 : 000002d6 r0 : 0000006f
Flags: nzCv IRQs off FIQs on Mode SVC_32
Resetting CPU ...
resetting ...
U-Boot SPL 2013.10-00198-gb348f87-dirty (Feb 18 2016 - 23:33:42)
reading u-boot.img
reading u-boot.img
We use U-Boot 2013.10, do you have any idea ?
Wich
