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Linux/AM4378: AM437x PWM drivers not working

Part Number: AM4378
Other Parts Discussed in Thread: AM4372

Tool/software: Linux

Hi All,

I am working on bringing up EPWM1, EPWM3, and EPWM5 on the AM4378 in linux kernel version 4.1.6. I started with the default driver code provided for my kernel, and added code to my DTS and am4372.dtsi file according to what was provided in the documentation, but have had no luck in getting a PWM signal. I am able to get the 3 different PWM modules to show up in my file system under /sys/class/pwm/pwmchip#, however, executing the following commands do not result in a PWM signal getting generated:

# echo 0 > /sys/class/pwm/pwmchip0/export
# echo 1000 > /sys/class/pwm/pwmchip0/pwm0/period
# echo 500 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle
# echo 1 > /sys/class/pwm/pwmchip0/pwm0/enable

These were the commands I sent when trying to get just EPWM1 working. Enabling EPWM1 in my dts file results in pwmchip0 showing up in the filesystem.

I've been applying the changes to bugs noted in the patches of this thread: 

https://groups.google.com/forum/#!activity/fa.linux.kernel/v2dQ1rCMBQAJ/fa.linux.kernel/hIUarvlTGeU/sGD6LrxpBAAJ

Currently my dts and dtsi submissions are as follows:

In my DTS file I have added the following submission:

&epwmss1 {
status = "okay";
};

I've also tried adding pinctrl-names = "default", "sleep";
pinctrl-0 = <&ehrpwm1_default>;
pinctrl-1 = <&ehrpwm1_sleep>; to this submission, where these are defined as follows:

ehrpwm1_default: ehrpwm0_default {
pinctrl-single,pins = <
0x158 MUX_MODE1 /* spi0_d1 (eHRPWM1A)*/
0x15C MUX_MODE1 /* spi0_cs0 (eHRPWM1B)*/
>;
};

ehrpwm1_sleep: ehrpwm0_sleep {
pinctrl-single,pins = <
0x158 MUX_MODE7 /* spi0_d1 (eHRPWM1A)*/
0x15C MUX_MODE7 /* spi0_cs0 (eHRPWM1B)*/
>;
};

but this only pulled the pwm pin low rather than high and did not fix the issue of no pwm signal getting generated.

My current submission is am4372.dtsi is as follows:

epwmss1: epwmss@48302000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48302000 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "epwmss1";
status = "disabled";

ehrpwm1: pwm@48302200 {
compatible = "ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48302200 0x80>;
ti,hwmods = "ehrpwm1";
clocks = <&ehrpwm1_tbclk>;
clock-names = "tbclk";
};
};

Again, I've tried a large variety of settings here as well. My first question/concern here is that the default value for the reg of epwmss1 in the documentation is reg = <0x48300000 0x10>;
I've changed this value to reg = <0x48300000 0x100>; because the size of PWMSS0 in Table 2-3 of the L4_PER mem map in section 2.1.3 page 145 of the datasheet is 256 bytes. Regardless, neither 0x10 or 0x100 here resulted in my drivers working.
Similarly, the reg value for ehrpwm1 in the documentation and in the patch link provided is reg = <0x48302200 0x80>; The datasheet on page 145 says the size of EPWM is 96b so i've also tried the proper value of reg = <0x48302200 0x60>; here with no luck. I've also tried not including the clocks, which is what the documentation suggests, with no luck. I'm fairly confident clocks are being properly configured in my clock file.

A final question, I notice that in the patch link I posted as well as in the documentation some users post compatible parameters of ti,am4372-pwmss and ti,am4372-ehrpwm for the epwmss and ehrpwm's respectively, yet I've not found drivers anywhere on the internet that have these compatibility parameters. Do drivers that support AM4372 pwms actually exist, or do I need to write my own custom ones?

Any help getting these pwm modules working would be much appreciated.

Kind regards,

Taylor Fahey

  • Hi Taylor,

    See this thread, for details on how to set the &epwmss1 :
    e2e.ti.com/.../2080629

    Best Regards,
    Yordan
  • Yordan,

    Thanks for the reply. I've modified my dts file according to the information in that topic, but my PWM still fails to work. Can you please address my questions in my first post so I have confidence in the values I am setting in my dtsi file? Also, do you know where in the datasheet mux_modes are described? I've looked everywhere with no luck. Below is my current  broken configuration. 

    in my dts file:

    &am43xx_pinmux {

    ...

    ehrpwm1_pins: ehrpwm1_pins {
    pinctrl-single,pins = <
    0x158 (PIN_OUTPUT | MUX_MODE3) /* spi0_d1 (eHRPWM1A)*/
    0x15C (PIN_OUTPUT | MUX_MODE3) /* spi0_cs0 (eHRPWM1B)*/
    >;
    };

    }


    &epwmss1 {
    status = "okay";
    ehrpwm1: pwm@48302200 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&ehrpwm1_pins>;
    };
    };

    in my dtsi file:

    epwmss1: epwmss@48302000 {
    compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
    reg = <0x48302000 0x10>;
    ti,hwmods = "epwmss1";
    #address-cells = <1>;
    #size-cells = <1>;
    status = "disabled";
    ranges = <0x48302100 0x48302100 0x80 /* ECAP */
    0x48302180 0x48302180 0x80 /* EQEP */
    0x48302200 0x48302200 0x80>; /* EHRPWM */

    ehrpwm1: pwm@48302200 {
    status = "disabled";
    compatible = "ti,am33xx-ehrpwm";
    #pwm-cells = <3>;
    reg = <0x48302200 0x80>;
    ti,hwmods = "ehrpwm1";
    clocks = <&ehrpwm1_tbclk>;
    clock-names = "tbclk";
    };
    };



    commands:

    # echo 0 > /sys/class/pwm/pwmchip0/export
    # echo 1000 > /sys/class/pwm/pwmchip0/pwm0/period
    # echo 500 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle
    # echo normal > /sys/class/pwm/pwmchip0/pwm0/polarity
    # echo 1 > /sys/class/pwm/pwmchip0/pwm0/enable
    result is the pin is held low, toggles high for 6.5 seconds, and remains low forever after that despite the above commands being executed.

    Thanks again for your time and help.

  • Taylor,

    The mux modes for each pin are given in the device datasheet in table 4-10:  http://www.ti.com/lit/gpn/am4378

    From what I can tell from your dts above you are using pins T20 and T21 and the mux mode that you should be using for both is mux mode 0x8 which corresponds to ehrpwm1B and ehrpwm1A respectively.

    Also make sure that the pwmchip number you are using in the sysfs comands matches the PWM that you are enabling in the device tree and configuring the pin muxing for (it seems like you are trying to enable and pin mux PWM1 and then your sysfs entries above are being done on pwmchip0 instead of pwmchip1.

    Can you provide just your additions to the device tree where you are enabling and pin muxing pwmss1?

    Jason Reeder

  • Jason,

    Thank you very much for the helpful response, my issue proved to be purely a pin muxing issue, changing the mux to mode 8 for PWM1 and 6 for PWM3/5 solved the issue and PWM now works flawlessly.

    What is strange though is that I am only enabling PWM1/3/5 and in my sysfs commands I get pwmchip0, pwmchip2, and pwmchip4 for PWM1/3/5 respectively in /sys/class/pwm. I'm assuming this is alright since it works, but it is unexpected.
    Thanks again!

    Taylor Fahey