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USB DMA CPPI41 RX scenario is possible?

Other Parts Discussed in Thread: AM3352

Hi all, I'm AM3352 CPU user.

I tried 'CPPIi41 RX' for a long time , But failed.

Cppi41 RX Example scenario is below.

Is this possible?

 

- HOST to DEVICE Transfer

- All data length is 1194bytes

- One PD repeatedly use.

- Endpoint size is 512bytes

- I want to generated interrupt just once . When transfer completed !!! <- (important)

 

 

 

Question

1. If this scenarios is possible, I want that's procedure.

2. I need reference source and document.

 

I don't find solution for a long time.

Plz help me. thanks

 

  • Hello yul lee,


    From your Diagram , I believe you are trying to send data to a device using AM335x as the host. If my assumption is correct please read through further.

    CPPI DMA has an operating mode called as GRNDIS mode through which you can send multiple Max packet transfers and then get interrupted after the transfer is done. Currently StarterWare USB stack does not support this as the AM335x CPPI dma has certain  silicon bugs  ( Refer attachment) which forces us to work in transparent mode. In this mode you would get an interrupt after a max packet transfer is done.

    My suggestion to you would be to

    1. try modifying the ISR routine to count the number of bytes and then indicate to the upper layer once the required amount of bytes have been transferred.

    2. The more risky GRNDIS mode which is the perfect solution for you, but has a certain possibility of you hitting Si bugs.

     

  • Thank. Vineeth

     

    assumption is below

    1. Host : PC,  Device : AM3352

    2. Host -> Device Data length is up to 6M , 1194bytes length is just example.

     

    I Tried to receive data in GRNDIS mode (PC->AM3352) After this posted  , 

    But received data was lost. It's data length is approximately 512* n bytes (when 5.2M transfered, n = 1~5)

    and get interrupted 65536 packet transfer is done.

    And Now, Receive in transparent mode possible. But This method generated very many numbers interrupt (get interrupted 512 bytes done)

     

    my question

     (1). in AM3352 device mode(PC->AM3352 transfer), GRNDIS mode use impossible? (because data error?)

     (2). If GRNDIS mode is instability. I want get interrupted after all data transfer is done. Is this Possible In transparent mode ??

            (One HPD repeatedly use, Buffer size 512bytes)

     (3).  if (1).(2) is impossible,  plz know me other solution.

     (4).  If i will use  revision 2.0 or 2.1. Is This Silicon Bug fixed?

     

    thank. ~~

  • hi Yul Lee,

    In GRNDIS mode of operation the maximum data an Buffer descriptor can handle is (defined in  GENERIC RNDIS EPn Size register) is 65536 bytes. You would get interrupted after this BD is complete and moved to the completion Q.

    Could you please clarify your statement that the "received data is getting lost".

    In transparent mode you would be interrupted every 512 bytes.

    1) GRNDIS mode RX has certain Silicon bugs associated with it and hence is not recommended.

    2. In transparent mode you will get interrupted after 512 bytes . There is no alternative to this.

    3. I am unable to think of a clean solution . Do you know how many bytes would be sent by the host before hand ?

    4) No this silicon bug has not been fixed in the successive revisions

  • thanks reply.

     

    Question 3 Answer => First part of Host transfer data  is header data (20byte) , Header is included total length.

     

    And Now. I decided to use transparent mode RX and Revision 2.1 chip .

     

    But I have new Question. Below In StarterWare Code .

    SYS_INT_USB0 and SYS_INT_USBSSINT share Interrupt Handler. (USB0DeviceIntHandler)

    If I will seperate Interrupt Handler of SYS_INT_USBSSINT. (ex name CPDMAHandler)

    Does Interrupt generated  When 512byte  Rx Completed.? (transparent mode)

    I consider that USBSSINT Interrupt is not generated evert time rx Completed .

     

    When does occur SYS_INT_USBSSINT ?

     

    ////////////////////////////////////////////////////////////////

    static void USB0AINTCConfigure(void)

    {  

         /* Initializing the ARM Interrupt Controller. */

         IntAINTCInit();

         /* Registering the Interrupt Service Routine(ISR). */

         IntRegister(SYS_INT_USB0, USB0DeviceIntHandler);

         /* Setting the priority for the system interrupt in AINTC. */    

         IntPrioritySet(SYS_INT_USB0, 5, AINTC_HOSTINT_ROUTE_IRQ);

         /* Enabling the system interrupt in AINTC. */  

         IntSystemEnable(SYS_INT_USB0); }

     

    static void CPDMAAINTCConfigure(void)

    {

         /* Registering the Interrupt Service Routine(ISR). */   

         IntRegister(SYS_INT_USBSSINT, USB0DeviceIntHandler);

        /* Setting the priority for the system interrupt in AINTC. */   

        IntPrioritySet(SYS_INT_USBSSINT, 6,    AINTC_HOSTINT_ROUTE_IRQ);

        /* Enabling the system interrupt in AINTC. */    

        IntSystemEnable(SYS_INT_USBSSINT);

    }