UART1 to UART5

terry

Other Parts Discussed in Thread: AM3358

Dear Starterware team, Could you able to provide UART1/UART2/UART3/UART4/UART5 , example code please?

I am working on AM3358 beaglebone black with starterware, My uart0 is working fine and looking for a coed to build UART4

over 11 years ago

0 qxc over 11 years ago

Genius 5820 points

How about the examples that come with starterware? uart, uart_edma and usb_dev_serial all show how to use UART.

0 terry over 11 years ago in reply to qxc

Intellectual 900 points

Hi Hans, Example of starterware is all about UART0. UART0 is using totally different clock and regietr than rest of the UART

0 Carlos Radtke over 11 years ago in reply to terry

Prodigy 70 points

in fact, to use the others UARTs you need to activate the internal clocks (L3S and L4). It took me a few days to realise they are in different power domains (wakeup and Peripheral).

There I took the DMTimer2ModuleClkConfig() and the UARTModuleClkConfig() from the libs (because timer2 are in the same power domain the UART1) and made this UART1clock config.

It worked for UART1, but not for UART5. There is this PIN MUX MODES described in the BeagleBone Black manual that I don´t understand yet.

sorry for my english, Maybe someone on the team can help.

0 terry over 11 years ago in reply to Carlos Radtke

Intellectual 900 points

HI carlos, Thanks for the reply. I enable the L3SClk and L4clk but still not working, I look at the UART4 register,

THR is not changing at all

0 Don Lawrence over 10 years ago in reply to Carlos Radtke

Expert 1320 points

Hi Carlos, I tried activating L3S and L4, with no success.
So I turned on every fracking clock and still no-go.
AND I am seeing interface and functional clock activity on UART1 also!
Some gremlin in that chip really does not like me.
So can you please post your code UART1clockconfig?
thanks..................dd

0 Carlos Radtke over 10 years ago in reply to Don Lawrence

Prodigy 70 points

this code I made based on Starterware_uart0. you can change each "1" for the desired uart. I've tested all of them. Sorry, it´s been a long time i made this. The code is supplied "as is".

/**********************************************************/

static void UART1ModuleClkConfig(void)
{
HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) =
CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

while((HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) &
CM_PER_L3S_CLKSTCTRL_CLKTRCTRL) != CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) =
CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

while((HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) &
CM_PER_L3_CLKSTCTRL_CLKTRCTRL) != CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) =
CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE;

while((HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) &
CM_PER_L3_INSTR_CLKCTRL_MODULEMODE) !=
CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE);

HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) =
CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE;

while((HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) &
CM_PER_L3_CLKCTRL_MODULEMODE) != CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE);

HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) =
CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

while((HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) &
CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL) !=
CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) =
CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

while((HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL) !=
CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKCTRL) =
CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE;

while((HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKCTRL) &
CM_PER_L4LS_CLKCTRL_MODULEMODE) != CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE);

HWREG(SOC_CM_PER_REGS + CM_PER_UART1_CLKCTRL) |= CM_PER_UART1_CLKCTRL_MODULEMODE_ENABLE;

while((HWREG(SOC_CM_PER_REGS + CM_PER_UART1_CLKCTRL) &
CM_PER_UART1_CLKCTRL_MODULEMODE) != CM_PER_UART1_CLKCTRL_MODULEMODE_ENABLE);

while(!(HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) &
CM_PER_L3S_CLKSTCTRL_CLKACTIVITY_L3S_GCLK));

while(!(HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) &
CM_PER_L3_CLKSTCTRL_CLKACTIVITY_L3_GCLK));

while(!(HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) &
(CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L3_GCLK |
CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L4_GCLK)));

while(!(HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
(CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_L4LS_GCLK |
CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_UART_GFCLK)));

/* Waiting for MODULEMODE field to reflect the written value. */
while(CM_PER_UART1_CLKCTRL_MODULEMODE_ENABLE !=
(HWREG(SOC_CM_PER_REGS + CM_PER_UART1_CLKCTRL) &
CM_PER_UART1_CLKCTRL_MODULEMODE));

/*
** Waiting for IDLEST field in CM_WKUP_UART0_CLKCTRL register to attain
** desired value.
*/
while((CM_PER_UART1_CLKCTRL_IDLEST_FUNC <<
CM_PER_UART1_CLKCTRL_IDLEST_SHIFT) !=
(HWREG(SOC_CM_PER_REGS + CM_PER_UART1_CLKCTRL) &
CM_PER_UART1_CLKCTRL_IDLEST));

/* RXD */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RXD(1)) =
(CONTROL_CONF_UART1_RXD_CONF_UART1_RXD_PUTYPESEL |
CONTROL_CONF_UART1_RXD_CONF_UART1_RXD_RXACTIVE);

/* TXD */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_TXD(1)) =
CONTROL_CONF_UART1_TXD_CONF_UART1_TXD_PUTYPESEL;

}

void Config_Uart1(void)
{
unsigned int divisorValue = 0;

/* Configuring the system clocks for UART0 instance. */
UART1ModuleClkConfig();
/* Performing a module reset. */
UARTModuleReset(SOC_UART_1_REGS);

/* Computing the Divisor Value. */
divisorValue = UARTDivisorValCompute(UART_MODULE_INPUT_CLK,
BAUD_RATE_115200,
UART16x_OPER_MODE,
UART_MIR_OVERSAMPLING_RATE_42);

/* Programming the Divisor Latches. */
UARTDivisorLatchWrite(SOC_UART_1_REGS, divisorValue);

/* Switching to Configuration Mode B. */
UARTRegConfigModeEnable(SOC_UART_1_REGS, UART_REG_CONFIG_MODE_B);

/* Programming the Line Characteristics. */
UARTLineCharacConfig(SOC_UART_1_REGS,
(UART_FRAME_WORD_LENGTH_8 | UART_FRAME_NUM_STB_1),
UART_PARITY_NONE);

/* Disabling write access to Divisor Latches. */
UARTDivisorLatchDisable(SOC_UART_1_REGS);

/* Disabling Break Control. */
UARTBreakCtl(SOC_UART_1_REGS, UART_BREAK_COND_DISABLE);

/* Switching to UART16x operating mode. */
UARTOperatingModeSelect(SOC_UART_1_REGS, UART16x_OPER_MODE);

/* Enabling the specified UART interrupts. */
UARTIntEnable(SOC_UART_1_REGS, (UART_INT_LINE_STAT | UART_INT_RHR_CTI) );
}

0 Lalindra Jayatilleke over 10 years ago in reply to Carlos Radtke

TI__Mastermind 30365 points

All,

Please take a look at the attached doc for a procedure on modifying the UART0 example in the ProcessorSDK package to work with UART1. This is for BeagleBone BLack (BBB). Hoping to get this doc into a wiki.

There might be some redundant steps in this draft, so please provide any feedback on any steps that don't make sense.

Steps start with the PinMux tool changes ==>Testing UART1 on the BBB.

Lali

/cfs-file/__key/communityserver-discussions-components-files/790/1104.UART1_5F00_custom_5F00_modification_5F00_steps_5F00_AM335x.pdf

0 Don Lawrence over 10 years ago in reply to Carlos Radtke

Expert 1320 points

OK thanks Carlos.

I'll get on it right away.............dd

0 Chris Otto over 9 years ago in reply to Carlos Radtke

Prodigy 10 points

For the different UARTS you need to modify the above pinmux code to include the operation mode.

/* RXD */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RXD(1)) =
(MODE | CONTROL_CONF_UART1_RXD_CONF_UART1_RXD_PUTYPESEL |
CONTROL_CONF_UART1_RXD_CONF_UART1_RXD_RXACTIVE);

/* TXD */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_TXD(1)) =
MODE | CONTROL_CONF_UART1_TXD_CONF_UART1_TXD_PUTYPESEL;

For UART1 MODE = 0
For UART2 MODE = 3
For UART3 MODE = 3
For UART4 MODE = 6
FOR UART5 MODE = 4

For UART0 the setup is much different as it uses different clocks and so on but the operation mode is 0;

The macros CONTROL_CONF_UART_RXD(n) and CONTOL_CONF_UART_TXD(n) only address the correct registers for UART0 and UART1 since ...

CONTROL_CONF_UART_RXD(0) = 0x970 + n * 0x10 = 0x970 ... the true value
CONTROL_CONF_UART_RXD(1) = 0x970 + n * 0x10 = 0x980 ... the true value
CONTROL_CONF_UART_RXD(2) = 0x970 + n * 0x10 = 0x990 ... think the true value should be 0x900
CONTROL_CONF_UART_RXD(3) = 0x970 + n * 0x10 = 0x9A0 ... think the true value should be 0x8F8
CONTROL_CONF_UART_RXD(4) = 0x970 + n * 0x10 = 0x9B0 ... think the true value should be 0x870
CONTROL_CONF_UART_RXD(5) = 0x970 + n * 0x10 = 0x9C0 ... know the true value should be 0x8C0

CONTROL_CONF_UART_RXD(0) = 0x974 + n * 0x10 = 0x974 ... the true value
CONTROL_CONF_UART_RXD(1) = 0x974 + n * 0x10 = 0x984 ... the true value
CONTROL_CONF_UART_RXD(2) = 0x974 + n * 0x10 = 0x994 ... think the true value should be 0x904
CONTROL_CONF_UART_RXD(3) = 0x974 + n * 0x10 = 0x9A4 ... think the true value should be 0x8FC
CONTROL_CONF_UART_RXD(4) = 0x974 + n * 0x10 = 0x9B4 ... think the true value should be 0x874
CONTROL_CONF_UART_RXD(5) = 0x974 + n * 0x10 = 0x9C4 ... know the true value should be 0x8C4

I know the values for UART5 to be correct because I actually got it working on our board and also on the beaglebone black.

0 Don Lawrence over 9 years ago in reply to Chris Otto

Expert 1320 points

Hi Chris. Thanks. I'll get around to fixing this problem eventually.

Making good progress on MMC right now, plus I gotta job.

later..............dd

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UART1 to UART5