Assigning a specific interrupt to Hwi in SYS/BIOS on 6748

OK:

I worked out how to do this myself in the end. It is not hard but it does appear to be missing from any of the documentation, maybe a new wiki page could be created?

It turns out that all the peripheral events can be user programmed to one of 12 CPU interrupts (INT4 through INT15). This is documented in the DSP megamodule guide (SPRUFK5). We simply have to set the event number for the SPI1 peripheral (43 from the device data sheet) into the correct field of the INTMUX registers. I have used INT5 so I need to poke 43 into bits 14-8 of INTMUX1. The CSL header files define labels for the event numbers and a structure for the registers, so the desired behaviour is achieved with:

#include <ti/psp/cslr/cslr_dspintc.h>

#include <ti/psp/cslr/soc_OMAPL138.h>

CSL_DspintcRegsOvly intcRegs = (CSL_DspintcRegsOvly)(CSL_INTC_0_REGS);

intcRegs->INTMUX1 = CSL_INTC_EVENTID_SPIINT1 << 8;

I then use 5 as the ‘intNum’ argument of the 'Hwi.create' call in my config script:

var Hwi = xdc.useModule('ti.sysbios.hal.Hwi');

var hwiParams = new Hwi.Params;

Program.global.hwi0 = Hwi.create(5, "&hwiFunc", hwiParams);

With interrupts enabled in the SPI1 module, this does the trick. Note that the SPI module contains a register called ‘SPI Interrupt Level Register (SPILVL)’ which seems to imply that the SPI can only drive INT1 – however, I think that this refers to which interrupt line out of the SPI module is used for which SPI Event so that different events can drive different interrupts. As it happens, there is only one line out of the module so the SPILVL register just acts like an interrupt mask register.

Cheers,

John.