cache setting for sysBios 6.33.6.50 for C6657 dsp

Weichun Yuan

Other Parts Discussed in Thread: SYSBIOS, TMS320C6657

I am running sysBios 6.33.6.50, MCSDK 2.1.1.4 and PDK TMS320C6657 version 1.1.1.4. XDCtool is 3.32.4.60. CCS version is 5.2.1.00018.

Following spruex3k-7.pdf section 6.6.2, I added the following lines to the cfg file

var Cache = xdc.useModule('ti.sysbios.hal.Cache');

var ti_sysbios_family_c66_Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
ti_sysbios_family_c66_Cache.MAR_128_159 = 0;

and got the following error message:

Description Resource Path Location Type
ti.sysbios.family.c66.Cache: no element named 'MAR_128_159' GaussEVMc6657.cfg /GaussEVMc6657 25 C/C++ Problem

I have the following questions:

1. In stead of ti.sysbios.family.c64p I used c66. Would this make a difference? If I change it to 64p, would it cause trouble for C66 processor?

2. I understand the number MAR_128 as MAR register 128, where does the number 159 come from? If I try to access other registers, which number should I use for instance MAR_130_???

3. how do I solve this cfg file problem?

thanks

Weichun

over 12 years ago

0 judahvang over 12 years ago

TI__Mastermind 32475 points

Weichun,

1. You should not use the c64p cache with C66 device.

2. You can use the following meta function to set the appropriate MAR register for c66 Cache. Cache.setMarMeta(baseAddr, byteSize, value)

3. For each MAR value is a bitmask for 32 MAR registers thus 128 to 159. Since on C64P devices, only the LSB is used. So bit 0 = MAR 128, bit 1 = MAR 129, ... bit 31 = MAR 159

You can look at the cdocs for c66/cache for additonal information.

Judah

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cache setting for sysBios 6.33.6.50 for C6657 dsp