Other Parts Discussed in Thread: TM4C1231H6PGE
I have tm4C1231h6pge, and I tried both tirtos 1.10.00.23 and 1.21.00.09 with the same behaviour.
I can communicate successfully through i2c from Tiva to an EEprom, using I2C_transfer() function.
Conversely when the slave replies a NAK the function I2C_transfer() never returns.
I tried both I2C_MODE_BLOCKING and I2C_MODE_CALLBACK
How to avoid this behaviour?
best regards
Hi Tom,
i have developed a simple sample to replicate the behaviour (it is attached).
is very simple: I trigger the i2c transaction from a task. A pin goes hi before call to I2C_transfer() and the goes low after:
Void task1(UArg arg0, UArg arg1)
{
// setup the pin
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
ROM_GPIOPinTypeGPIOOutput(GPIO_PORTJ_BASE, GPIO_PIN_5);
ROM_GPIOPinWrite(GPIO_PORTJ_BASE, GPIO_PIN_5, 0);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
/* I2C0 Init */
/* Enable the peripheral */
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C0);
/* Configure the appropriate pins to be I2C instead of GPIO. */
ROM_GPIOPinConfigure(GPIO_PB2_I2C0SCL);
ROM_GPIOPinConfigure(GPIO_PB3_I2C0SDA);
ROM_GPIOPinTypeI2CSCL(GPIO_PORTB_BASE, GPIO_PIN_2);
ROM_GPIOPinTypeI2C(GPIO_PORTB_BASE, GPIO_PIN_3);
// ROM_I2CMasterInitExpClk(I2C0_BASE, 24576000UL, false);
I2C_init();
I2C_Params i2cParams;
/* Create I2C for usage */
I2C_Params_init(&i2cParams); // ok defaults
hI2c = I2C_open(I2CIDX, &i2cParams);
UChar c;
I2C_Transaction i2cTransaction;
i2cTransaction.slaveAddress = 0x30; /* 7-bit slave address, not present on bus */
i2cTransaction.writeBuf = &c; /* txBuffer to be TX'd */
i2cTransaction.writeCount = 1;
i2cTransaction.readBuf = NULL; /* rxBuffer to be RX'd */
i2cTransaction.readCount = 0; /* Number of bytes to be RX'd */
ROM_GPIOPinWrite(GPIO_PORTJ_BASE, GPIO_PIN_5, GPIO_PIN_5);
I2C_transfer(hI2c, &i2cTransaction);
ROM_GPIOPinWrite(GPIO_PORTJ_BASE, GPIO_PIN_5, 0);
}
note that I deliberately make a transaction with device 0x30 that is not present on the i2c bus.
I also have the scope trace:
the green and cyan trace are SDA and SCL signals, and the magenta is the moving pin (PJ5), ant it never get back to low.
If I try to debug and place a breakpoint on line 39, just after I2C_transfer() call, that point is never reached.
I have tried to debug also the source code of TI-RTOS driver, in particular I2CTiva_transfer() in file ti/tirtos_1_21_00_09/packages/ti/drivers/i2c/I2CTiva.c:
/*
* ======== I2CTiva_transfer ========
*/
Bool I2CTiva_transfer(I2C_Handle handle, I2C_Transaction *transaction)
{
UInt key;
Bool ret = FALSE;
I2CTiva_Object *object = handle->object;
I2CTiva_HWAttrs const *hwAttrs = handle->hwAttrs;
/* Check if anything needs to be written or read */
if ((!transaction->writeCount) && (!transaction->readCount)) {
/* Nothing to write or read */
return (ret);
}
if (object->transferMode == I2C_MODE_CALLBACK) {
/* Check if a transfer is in progress */
key = Hwi_disable();
if (object->headPtr) {
/* Transfer in progress */
/*
* Update the message pointed by the tailPtr to point to the next
* message in the queue
*/
object->tailPtr->nextPtr = transaction;
/* Update the tailPtr to point to the last message */
object->tailPtr = transaction;
/* I2C is still being used */
Hwi_restore(key);
return (TRUE);
}
else {
/* Store the headPtr indicating I2C is in use */
object->headPtr = transaction;
object->tailPtr = transaction;
}
Hwi_restore(key);
}
/* Acquire the lock for this particular I2C handle */
Semaphore_pend(Semaphore_handle(&(object->mutex)), BIOS_WAIT_FOREVER);
/*
* I2CTiva_primeTransfer is a longer process and
* protection is needed from the I2C interrupt
*/
Hwi_disableInterrupt(hwAttrs->intNum);
I2CTiva_primeTransfer(object, hwAttrs, transaction);
Hwi_enableInterrupt(hwAttrs->intNum);
if (object->transferMode == I2C_MODE_BLOCKING) {
Log_print1(Diags_USER1,
"I2C:(%p) Pending on transferComplete semaphore",
hwAttrs->baseAddr);
/*
* Wait for the transfer to complete here.
* It's OK to block from here because the I2C's Hwi will unblock
* upon errors
*/
Semaphore_pend(Semaphore_handle(&(object->transferComplete)),
BIOS_WAIT_FOREVER);
Log_print1(Diags_USER1,
"I2C:(%p) Transaction completed",
hwAttrs->baseAddr);
/* Hwi handle has posted a 'transferComplete' check for Errors */
if (object->mode == I2C_IDLE_MODE) {
Log_print1(Diags_USER1, "I2C:(%p) Transfer OK", hwAttrs->baseAddr);
ret = TRUE;
}
}
else {
/* Always return true if in Asynchronous mode */
ret = TRUE;
}
/* Release the lock for this particular I2C handle */
Semaphore_post(Semaphore_handle(&(object->mutex)));
/* Return the number of bytes transfered by the I2C */
return (ret);
}
I f I place a break point at line 72, that point is never reached, but if I place the breakpoint at line 64 (the Semaphore_post()) I can go ahead step by step, and all goes well.
I think that in normal conditions it will hangs on Semaphore_post(), as if the i2c interrupt trigger any more.
Tom Kopriva said:What EEPROM are you using? I'd like to try to replicate this.
I use an M24M02, but as told above you can replicate by sending a write transaction to an inexistent address.
best regards
max
