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LMG3422R030: LMG3422R030RQZT

BAGADI RAJA SEKHAR
Prodigy 80 points
Part Number: LMG3422R030

Tool/software:

Subject: Clarification on LMG3422R030 GaN FET Evaluation Board and Inverter Design

Dear Team,

I am currently working on designing an inverter using the LMG3422R030 GaN FET and have some doubts regarding its implementation. In our lab, we have the LMG3422R030 GaN FET with the synchronous buck evaluation board. I have reviewed the schematic, and I would like some clarification on the following points:

  1. In the provided schematic, resistors R3 (Ohm) and R5 (20k) are used for slew rate variations at the RDRV pin. However, I could not find these components in the evaluation board or the corresponding PCB file. Could you please clarify their necessity and functionality? how do i use these pins in my board.
  2. I do not intend to use the TEMP (pin 51) and OC (complement, pin 50) in my design. However, when I leave them floating in the simulation, the circuit does not function correctly. Could you confirm whether these pins can be left floating in practical implementation, or do they require specific connections?
  3. I have observed that adding capacitance at the LDO output pin causes the simulation to malfunction. Could you clarify whether this behavior is expected in practical implementation and whether adding capacitance at the LDO output will affect the inverter's operation?

I appreciate your guidance on these points. Looking forward to your response.

 

Thanks and Best Regards,

B Raja Sekhar

  • 0
    TI__Expert 3835 points

    Hi Bagadi, 

    1. The slew rate resistors are populated on the LMG3422R030EVM-043 - they are 20k resistors with designators R14 and R5. 

    As described in Section 7.3.8 of the datasheet, the LMG342xR030 allows users to adjust the drive strength of the device and obtain a desired slew rate, which provides flexibility when optimizing switching losses and noise coupling. To adjust drive strength, a resistor can be placed between the RDRV pin and GND pin. The resistance determines the slew rate of the device, from 20 V/ns to 150V/ns, during turn-on. On the other hand, there are two dv/dt values that can be selected without the resistor: shorting the RDRV pin to ground sets the slew rate to 150V/ns, and shorting the RDRV pin to LDO5V sets the slew rate to 100V/ns. The device detects the short to LDO5V one time at power up. Once the short to LDO5V condition is detected, the device no longer monitors the RDRV pin. Otherwise, the RDRV pin is continuously monitored and the dv/dt setting can be changed by modulating the resistance during device operation. The modulation must be fairly slow since there is significant internal filtering to reject switching noise

    In other words, the resistor placed at the RDRV pin is able to control the turn-on speed of the device, which provides a tradeoff between efficiency (turn-on overlap loss) and common-mode noise (conducted or radiated EMI). 

    2. These pins can be left floating. 

    3. This behavior is not expected in the practical implementation. There should be no issue with adding additional capacitance at the LDO5V pin. 

    Thanks,

    John

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