DS15BA101: acceptable capacitance value at Rvo pin

Isao Takigasaki

Part Number: DS15BA101

The datasheet mentions that the RVO network should be removed to minimize parasitic capacitance.
If the resistance between RVO pin and VCC is controlled by digital potentiometer with 40 to 90pF as capacitance between pins of the potentiometer, the capacitance value is acceptable?

Best Regards, Taki

over 3 years ago

0 Nasser Mohammadi over 3 years ago

TI__Guru* 93670 points

Greetings,

This has not been characterized. We typically remove GND or VCC under this pin to reduce parasitic. However, 40 to 90pF is high but as noted earlier this has not been characterized.

Regards,,Nasser

0 Isao Takigasaki over 3 years ago in reply to Nasser Mohammadi

TI__Intellectual 2970 points

Hi Nasser,
Thank you for your reply.

I understood.

What's happened if parasitic capacitance was added at the Rvo pin?

Best Regards, Taki

0 Nasser Mohammadi over 3 years ago in reply to Isao Takigasaki

TI__Guru* 93670 points

Greetings,

This is a reference voltage for internal analog circuitry. The extra parasitic may inject system/board level noise into this reference supply - causing noise/jitter on output signal.

Regards,,Nasser

0 Isao Takigasaki over 3 years ago in reply to Nasser Mohammadi

TI__Intellectual 2970 points

Hi Nasser,
I got it.

My idea to reduce the noise with using potentiometer, is to add a resistor between Rvo pin and the potentiometer, and the additional resistance value should be set as high as possible. Do you think that the idea can works to reduce the noise?

Best Regards, Taki

0 Nasser Mohammadi over 3 years ago in reply to Isao Takigasaki

TI__Guru* 93670 points

Hi Taki,

Theoretically this series Resistor should help to attenuate the noise - please note this Resistor pads add parasitic as well. However, i have not seen any design with this configuration that you are noted.

Regards,,Nasser

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DS15BA101: acceptable capacitance value at Rvo pin